Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
1999-08-17
2001-11-20
Flynn, Nathan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S533000, C257S536000
Reexamination Certificate
active
06320241
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a circuitry for switching transistors and a method of forming the same.
A circuitry in the form of a single chip is applied to various types of electronic components. This circuitry has a single substrate onto which a large number of semiconductor circuits are integrated.
The circuitry in the form of the single chip has a large number of lead pins which project from a resin package for connections to electronic components. The substrate onto which the semiconductor circuits are integrated is sealed within the resin package. On the circuit substrate, metal interconnections and connective terminals are provided in the form of a thin film together with the semiconductor circuits, wherein the semiconductor circuits are connected through the metal interconnections to the connective terminals. A large number of the connective terminals of the circuit substrate are connected through bonding wires to a large number of the lead pins, so that the lead pins are thus electrically connected indirectly to the semiconductor circuits sealed within the resin package. It is, however, possible that a high voltage is applied to the lead pins externally projecting from the circuitry, wherein such the high voltage may break the semiconductor circuit.
In order to prevent this problem, resistances are individually provided for every connective terminals of the circuit substrate, wherein the resistances are connected between the semiconductor circuit and the connective terminals, so that a surge current having entered from the connective terminal is smoothed by the resistances to prevent the semiconductor circuits from breaking.
If the circuitry has a metal oxide semiconductor structure, then a field oxide film is formed over a surface of the circuit substrate for isolating the semiconductor circuits, for which reason the resistances are provided over the field oxide film.
In accordance with this structure, the circuit substrate is grounded to be fixed at a reference voltage. If a high voltage is applied to the resistance, the high voltage is also applied to the field oxide film positioned between the resistances and the circuit substrate, whereby the field oxide film is also broken. Japanese laid-open patent publication no. 6-151716 discloses that other circuitry designed for solving this problem.
FIG
1
. is a fragmentary cross sectional elevation view illustrative of a conventional circuitry designed to prevent the field oxide film positioned between the resistances and the circuit substrate from being broken by a high voltage application.
A circuitry
100
has a first conductivity type circuit substrate, for example, a p-type substrate
101
. This p-type substrate
101
is grounded. A semiconductor circuit (not illustrated) is formed on a predetermined area of a surface of the p-type substrate
101
. Field oxide films
102
are also provided on the other area than the predetermined area (not illustrated) of the surface of the p-type substrate
101
for isolating the semiconductor circuit from a peripheral region. A field effect transistor
105
is provided over a surface area which is separated from the predetermined area on which the circuit is formed. The field effect transistor
105
is connected through an interconnection to the circuit (not illustrated). A resistive film
104
is also provided over the field oxide film
102
, wherein the resistive film
104
is connected to the field effect transistor
105
. Interlayer insulators are also provided on the field oxide film
102
. A via hole is formed which penetrates the inter-layer insulator, so that the contact hole is positioned over a part of the resistive film
104
. A connective terminal
103
is also provided which extends over the inter-layer insulator and also within the contact hole so that the connective terminal
103
is connected with the resistive film
104
, whereby the connective terminal
103
is electrically connected through the resistive film
104
and the field effect transistor
105
to the circuit on the predetermined area of the p-type substrate
101
. A through hole is also provided in the field oxide film so that the through hole is positioned under a part of the resistive film
104
. The resistive film
104
also extends within the through hole in the field oxide film
102
. An n-well
106
is provided in an upper region of the p-type substrate
101
so that the n-well
106
is positioned under the field oxide film
102
which is positioned under the resistive film
104
so that the n-well
106
is positioned under the resistive film
104
. The n-well
106
is connected with the resistive film
104
within the through hole in the field oxide film
102
.
The above described circuitry
100
is sealed within a resin package, so that the connective terminal
103
is further connected through a bonding wire (not illustrated) to a lead pin. Although only the single connective terminal
103
is illustrated, actually however a large number of the connective terminals
103
are connected to the bonding wires to the same number or large number of the lead pins. Input and output signals are transmitted through the connective terminal
103
, the resistive film
104
, the field effect transistor
105
to the circuit.
When static electricity is generated and a high voltage is applied to the connective terminal
103
, so that a surge current flows through the connective terminal
103
and smoothed by the resistive film
104
, thereby preventing the circuit from breaking. Further, the resistive film
104
is connected to the n-well
106
, thereby preventing the field oxide film
102
from breaking. Namely, although the p-type substrate
101
is grounded, the high voltage surface current is applied not only the resistive film
104
but also the n-well
106
. No large potential difference is applied to the field oxide film
102
sandwiched between the resistive film
104
and the n-well
106
. The surge current applied to the connective terminal
103
flows through the resistive film
104
an the field effect transistor
105
to the p-type substrate
101
which is grounded.
Meanwhile, recent circuitry and electronic components have reduced electric resistances and use signals of high frequency. In this circumstance, the primary object of provision of the resistive film has been changing from the protection of the semiconductor circuit to impedance matching. The resistance values have also been on decrease year by year.
The above circuitry
100
allows the resistive film
104
to prevent the semiconductor circuit from breaking even in the event of high voltage surge current and also allows the n-well
106
to prevent the field oxide film
102
from breaking even when the high voltage is applied to the resistive film
104
.
The above circuitry
100
is however not optimized in structure, whereby the protection of the field oxide film
102
from breaking is insufficient. Namely, a difference in position between the contact hole connecting the connective terminal
103
and the resistive film
104
and the through hole connecting the resistive film
104
to the n-well
106
. At the time when the high voltage surge current has just reached the part of the resistive film
104
under the contact hole, the potential of the n-well region
106
has not yet been increased, whereby the part of the resistive film
104
under the contact hole is different in potential from the n-well region
106
. This means that at the time when the high voltage surge current has just reached the part of the resistive film
104
under the contact hole, so that a high voltage is applied to the field oxide film
102
sandwiched between the n-well
106
and the resistive film
104
, whereby the field oxide film
102
may be broken.
Further, if the frequency of the signal to be inputted into the connective terminal
103
is high, there is increased an amount of the current per one unit time flowing through the resistive film
104
to an input capacitance of the circuit. This causes a further increase in heat
Flynn Nathan
Forde Remmon R.
NEC Corporation
Young & Thompson
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