Circuitry and method for suspending the automated erasure of a n

Details Circuitry and method for suspending the automated erasure of a n Circuitry and method for suspending the automated erasure of a n

1991-02-11

1994-10-11

Gossage, Glenn

Static information storage and retrieval

Magnetic bubbles

Guide structure

365218, 364DIG1, 395375, G06F 1300, G06F 9312, G11C 1606

Patent

active

053554647

ABSTRACT:
Circuitry for suspending an automated sequence for a nonvolatile semiconductor memory is described. The circuitry and memory reside on the same substrate. The circuitry includes a circuit for suspending erasure at a predetermined state of the erase sequence when a suspend signal is active and a circuit for resuming erasure at a predetermined state of the erase sequence when the suspend signal goes inactive. A method for suspending automated erasure sequence of a non-volatile semiconductor memory is also described. A suspend signal is received and erasure is suspended after a first erasure step of the erase sequence if suspend signal is active. Erasure resumes at a second erasure step of the erase sequence when the suspend signal goes inactive.

REFERENCES:
patent: 4327410 (1982-04-01), Patel et al.
patent: 4974208 (1990-11-01), Nakamura et al.
patent: 5034922 (1991-07-01), Burgess
patent: 5036488 (1991-07-01), Motarjemi
patent: 5053990 (1991-10-01), Kreifels et al.
patent: 5222046 (1993-06-01), Kreifels

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