Circuitry and method for duty measurement

Pulse or digital communications – Testing

Reexamination Certificate

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C327S033000, C327S036000

Reexamination Certificate

active

06549571

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to circuitry and a method for duty measurement and more particularly to circuitry and a method of the type sampling an input signal at N consecutive points to thereby measure the duty of the input signal.
Modern data communication services are required to have various kinds of capabilities in order to meet the increasing demand for data communications. To implement higher speed, broader range communication, among others, there have been proposed, e.g., an ISDN (Integrated Services Digital Network) basically featuring a transmission rate of 64 kilobits per second and a B (Broadband)-ISDN capable of sending a 100 times greater amount of data than ISDN. For higher speed, broader range communication, a network using optical fibers is essential in addition to the conventional network using copper cables.
However, the problem with a PDS (Passive Double Star) system or similar subscriber system is that an optoelectrical converter for converting an optical signal to an electric signal distorts the duty of the signal. A current trend is therefore toward the measurement of the duty of an input signal, giving up the ideal of reducing the distortion of a duty. By measuring the duty, it is possible to accurately identify data even when the duty of a data signal is distorted.
Conventional circuitry for the measurement of a duty has some problems left unsolved, as follows. An input signal must include an exclusive field in which a fixed pattern, e.g., a pattern of ONEs and ZEROs alternating with each other is arranged. Moreover, the position where the fixed pattern is present must be clearly detected in the input signal. Consequently, the generation and analysis of the input signal are complicated and render the construction of the optoelectric converter and that of the optical transmission system sophisticated.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide circuitry and a method for duty measurement capable of accurately measuring the duty of an input signal without resorting to an exclusive fixed pattern and even with a random pattern based on RZ (Return-to-Zero) code or NRZ (Non-Return-to-Zero) code.
In accordance with the present invention, in circuitry for measuring the duty of an input signal, at least one of a peak pulse width and a trough pulse width of the input signal is detected and is determined, when smaller than a preselected value, to be valid for the calculation of a duty value.
Also, in accordance with the present invention, a data identification system includes the above circuitry and a data identifying circuit for identifying, based on a duty output from the circuitry, data of the data signal and outputting the data as an identified data signal.
Further, in accordance with the present invention, a method of measuring the duty of an input signal includes a detecting step for detecting at least one of a convex pulse width and a concave pulse width, and a validating step for validating, if the convex pulse width or the concave pulse width detected is smaller than a preselected value, the convex pulse width or the concave pulse width for the calculation of a duty value.
Moreover, in accordance with the present invention, a method of identifying data includes the above method of measuring a duty of an input data signal, and a data identifying step for identifying, based on a duty output by the method, data of the data signal and outputting the data as an identified data signal.
In addition, in accordance with the present invention, a method of reproducing data includes a PLL (Phase Locked Loop) step for separating a clock signal from the data signal to thereby output a separated clock signal, the above method of measuring a duty of an input, a phase shifting step for shifting, based on the duty value output by the phase of the separated clock signal to thereby output a phase-shifted clock signal, and a flip-flop step for sampling the data signal in synchronism with the phase-shifted clock signal to thereby output a reproduced data signal.


REFERENCES:
patent: 4752927 (1988-06-01), Melling, Jr.
patent: 5210444 (1993-05-01), Johnson
patent: 5367200 (1994-11-01), Leonida
patent: 5598116 (1997-01-01), Kwon
patent: 5652668 (1997-07-01), Aulet et al.
patent: 6188738 (2001-02-01), Sakamoto et al.
patent: 6331999 (2001-12-01), Ducaroir et al.

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