Circuitry and method for adjusting signal length

Details Circuitry and method for adjusting signal length Circuitry and method for adjusting signal length

2007-09-04

2007-09-04

Mai, Son L. (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S233100, C327S031000

Reexamination Certificate

active

11178169

ABSTRACT:
A circuit for adjusting a signal length is adapted for a memory device. The circuit adjusts a signal length of an ATD signal. The circuit includes a timing module, an encoding module and a logical control unit. Wherein, the timing module generates a plurality of timing signals according a pulse generated by the ATD signal. The encoding module is coupled to one of the data lines of the memory device. The timing signals are registered and encoded to generate a time value according to the status of the data output from the memory device. In addition, the logic control unit compares the present time value and the previous time value to generate a comparison result. The signal length of the ATD signal is adjusted according to the comparison result.

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