Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2007-01-02
2007-01-02
Cuneo, Kamand (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S255000, C361S761000, C361S763000, C257S698000
Reexamination Certificate
active
10882170
ABSTRACT:
A circuitized substrate which includes a plurality of contiguous open segments along a side edge portion of the at least one electrically conductive layer thereof, these open segments isolated by a barrier of dielectric material which substantially fills the open segments, e.g., during a lamination process which bonds two dielectric layers of the substrate to the conductive layer. A method of making the substrate, an electrical assembly utilizing the substrate, a multilayered circuitized assembly also utilizing the substrate and an information handling system, e.g., a mainframe computer, are also provided.
REFERENCES:
patent: 5384433 (1995-01-01), Osann, Jr. et al.
patent: 5418689 (1995-05-01), Alpaugh et al.
patent: 5488540 (1996-01-01), Hatta
patent: 5639989 (1997-06-01), Higgins, III
patent: 5672911 (1997-09-01), Patil et al.
patent: 5685070 (1997-11-01), Alpaugh et al.
patent: 5708569 (1998-01-01), Howard et al.
patent: 5736796 (1998-04-01), Price et al.
patent: 5888627 (1999-03-01), Nakatani
patent: 5912809 (1999-06-01), Steigerwald et al.
patent: 6058022 (2000-05-01), Gianni et al.
patent: 6091310 (2000-07-01), Utsumi et al.
patent: 6204453 (2001-03-01), Fallon et al.
patent: 6236572 (2001-05-01), Teshome et al.
patent: 6246112 (2001-06-01), Ball et al.
patent: 6288906 (2001-09-01), Sprietsma et al.
patent: 6331451 (2001-12-01), Fusaro et al.
patent: 6349038 (2002-02-01), Hailey
patent: 6365839 (2002-04-01), Robbins et al.
patent: 6418031 (2002-07-01), Archambeault
patent: 6507495 (2003-01-01), Hailey et al.
patent: 6518516 (2003-02-01), Blackwell et al.
patent: 6557154 (2003-04-01), Harada et al.
patent: 6879494 (2005-04-01), Zu et al.
patent: 6900992 (2005-05-01), Kelly et al.
patent: 2002/0108780 (2002-08-01), Blackwell et al.
patent: 2002/0148642 (2002-10-01), Glovatsky et al.
patent: 2005/0205292 (2005-09-01), Rogers et al.
Larnerd James M.
Lauffer John M.
Markovich Voya R.
Cuneo Kamand
Endicott Interconnect Technologies, Inc.
Fraley Lawrence R.
Hinman, Howard & Kattell LLP
Nguyen Hoa C.
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