Circuitized substrate and method of making same

Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Coating selected area

Reexamination Certificate

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Reexamination Certificate

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06905589

ABSTRACT:
A method of making a circuitized substrate in which a commoning layer is used to form multiple, substantially vertically aligned conductive openings in a multilayered component such as a laminate interposer for coupling a chip to a printed circuit board or the like. The structure, including such a chip and circuit board is ideally suited for use within an information handling system.

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