Circuit utilizes N-channel mos transistors having reduced area d

Details Circuit utilizes N-channel mos transistors having reduced area d Circuit utilizes N-channel mos transistors having reduced area d

1990-07-24

1992-06-30

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307573, 307270, 307257, 3072968, 307264, H03K 17687, H03K 301, H03K 1774, H03L 500

Patent

active

051266032

ABSTRACT:
The inventive power supply detecting circuit includes an additional fifth, sixth, seventh and eighth MOS transistors within an output buffer H bridge circuit of a conventional type, in order to reduce the power consumption in the electric current detection circuit thereof. The fifth MOS transistor has a drain connected to a power supply terminal. Its source is connected to an electric current detecting terminal. Its gate is connected to a first internal input terminal. The sixth MOS transistor has a drain connected to the electric current detecting terminal. Its source is connected to a first output terminal. Its gate is connected to the first internal input terminal. The seventh MOS transistor has a drain connected to the power supply terminal. Its source is connected to the electric current detecting terminal. Its gate is connected to a second internal input terminal. The eighth MOS transistor has a drain connected to the electric current detecting terminal. Its source is connected to a second output terminal. Its gate is connected to the second internal input terminal. The size of the fifth through eighth MOS transistors is smaller than the size of the other MOS transistors which together constitute the output buffer H bridge circuit. This arrangement significantly reduces the amount of electric power that is consumed in the electric current detecting circuit.

REFERENCES:
patent: 4859877 (1989-08-01), Cooperman et al.
patent: 4931676 (1990-06-01), Baiocchi et al.
patent: 4950919 (1990-08-01), Rossi et al.
patent: 5057720 (1991-10-01), Hattori

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