Circuit to prevent pirating of an MOS circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307450, 307468, H03K 19094

Patent

active

045830118

ABSTRACT:
A method and circuit arrangement are disclosed for foiling an attempt to copy an MOS integrated circuit by implementing in the circuit an additional pseudo MOS device, which from its location in the circuit would appear to a would-be copier to be an enhancement-mode device. However, the pseudo-auxiliary MOS device is implemented as a depletion-mode device and is connected in the circuit so that when it is implemented by the copier as an enhancement-mode device. the overall circuit will not be functional.

REFERENCES:
patent: 4084105 (1978-04-01), Teranishi et al.
patent: 4409434 (1983-10-01), Basset et al.
patent: 4482822 (1984-11-01), Kamuro et al.
patent: 4495427 (1985-01-01), Cartwright, Jr.

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