Circuit testing utilizing data compression and derivative mode v

Electricity: measuring and testing – Plural – automatically sequential tests

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371 27, G01R 3128

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active

046528148

ABSTRACT:
A circuit tester and test technique are presented that compresses the amount of data stored in local test data RAMs for the implementation of a circuit test, thereby reducing the amount of data that must be downloaded to the local test data RAMs, thereby improving test throughput. Derivative data vectors are utilized in addition to raw data vectors as part of the data compression technique. Further compression results from storing only unique data vectors in the local test data RAMs and utilizing a sequencer to control the order in which the unique data vectors are utilized. The sequencer includes test program logic and logic capable of implementing on test pins indirect counters.

REFERENCES:
patent: 4433414 (1984-02-01), Carey
Cave, T., "Compressing Test Patterns to Fit into LSI Testers", Electronics, Oct. 12, 1978, pp. 136-140.
Electronics International, vol. 54, No. 22, Nov. 1981, New York, USA; G. C. Gillette, "Tester Takes on VLSI with 264-K Vectors Behind Its Pins", pp. 122-127, * pp. 124, 123-127 * .
Tom E. Finnell, "In-Circuit Testing of LSI-Based PCBs", Electronic Production, Sep. 1982, p. 47.

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