Circuit technique that sets transconductance

Amplifiers – With semiconductor amplifying device – Including differential amplifier

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330260, H03F 345

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active

055594700

ABSTRACT:
A fast parasitic-insensitive continuous-time filter and equalizer integrated circuit that uses an active integrator is described. Circuit techniques for excess-phase cancellation, and for setting the corner-frequency of the filter and equalizer are also described. These techniques result in a filter and equalizer chip with performance independent of process, supply, and temperature without employing phase-lock loops. This 20MHz 6th order Bessel filter and 2nd order equalizer operate from 5V, and generate only 0.24% (-52dB) of total harmonic distortion when processing 2Vp-p differential output signals. The device is optimized to limit high-frequency noise and to amplitude equalize the data pulses in hard disk read-channel systems. The device supports data rates of up to 36Mbps, and is built in a 1.5 .mu./4GHz BiCMOS technology.

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patent: 5001441 (1991-03-01), Gen-Kuong
patent: 5028882 (1991-07-01), Marrah
patent: 5218319 (1993-06-01), Takimoto
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G. A. DeVeirman, et al., "A 27 MHZ Programmable Bipolar 0.05.degree. Equiripple Linear-Phase Lowpass Filter", ISSCC Digest of Technical Papers, Feb. 1992.
C. A. Laber, et al., "Design Considerations for a High-Performance 3 .mu.m CMOS Analog Standard-Cell Library", IEEE Journal of Solid-State Circuits, vol. SC-22, No. 2, pp. 181-189, Apr. 1987.
C. A. Laber and P. Gray, "A 20 MHZ 6th Order BiCMOS Programmable Filter Using Parasitic-Insensitive Integrators", Symposium on VLSI Circuits, Digest of Technical Papers, Seattle, Washington, Jun. 1992.
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ML6006 Data Sheet, 36 Mbps Read Channel Filter/Equalizer, Micro Linear Corporation, San Jose, California, pp. 5-221-5-230, Jul. 1992.

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