Circuit technique for logic integrated DRAM with SIMD architectu

Details Circuit technique for logic integrated DRAM with SIMD architectu Circuit technique for logic integrated DRAM with SIMD architectu

1997-05-30

1998-10-06

Le, Vu A.

Static information storage and retrieval

Addressing

Plural blocks or banks

365233, G11C 700

Patent

active

058187880

ABSTRACT:
In a logic integrated DRAM LSI with SIMD architecture, a intentional clock skew is introduced for both between DRAM blocks and between logic blocks due to reduce the magnitude of peak current, operation frequency and number of I/O are defined for both DRAM blocks (frequency f.sub.M, I/O number m) and logic blocks (frequency f.sub.N, I/O number n) to keep the relation of

REFERENCES:
patent: 5528549 (1996-06-01), Doddington et al.
patent: 5689677 (1997-11-01), MacMillan

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