Circuit technique for creating predetermined duty cycle

Details Circuit technique for creating predetermined duty cycle Circuit technique for creating predetermined duty cycle

1990-03-19

1992-04-07

Callahan, Timothy P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307471, 307479, 307234, 307265, 328 20, H03L 700, H03K 1921

Patent

active

051031140

ABSTRACT:
A circuit for allowing a clock of any specified duty cycle to be created from a clock of the same frequency using standard digital delay lines. In particular, an EXOR function is implemented to generate a clock signal having a frequency which is twice the frequency of its input signals by using standard logic components such that the active branch for each input edge has an independent path to the output signal. In this manner, if a time delay is introduced into the active branch and only the active branch, the corresponding output edge and only that edge will be delayed by a like amount. Over a complete cycle of the input waveforms, four output edges are produced (two clock cycles). By varying the delay on the input branches, these output edges can be placed independently and arbitrarily within the period. As such, an output waveform having any desired duty cycle can be created independent of the phase relationship between the two input waveforms.

REFERENCES:
patent: 3479603 (1969-11-01), Overstreet, Jr.
patent: 3786357 (1974-01-01), Belle Isle
patent: 4077010 (1978-02-01), Ryon
patent: 4669099 (1987-05-01), Zinn
McGahee, "Pulse-Frequency Doubler Requires No Adjustment", Electronics, Apr. 17, 1975, p. 149.

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