Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2001-02-05
2003-02-18
Young, Brian (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S118000, C341S143000, C341S150000
Reexamination Certificate
active
06522277
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a multi-bit data converter, wherein the data converter may be a digital-to-analog (“D/A”) converter or a D/A converter used within a feedback path of an analog-to-digital (“A/D”) converter. The data converter utilizes differing rotational algorithms, each being independent of the other. Preferably one algorithm involves rotation in one direction and the other algorithm involves rotation in another direction, with pointers keeping track of the last component connected. Thus, the data converter preferably involves a bi-directional rotation mechanism to select from among a plurality of components for connection within the D/A converter in order to minimize non-linearity, tonal distortion and complexity normally attributed to conventional rotational or purely random dynamic element matching (“DEM”) logic.
2. Description of the Related Art
A popular data converter is a D/A converter either placed directly in the digital bitstream path or in the feedback loop path of an A/D converter. A typical A/D converter is one that quantifies the incoming analog signal magnitude at various time slices or sampling periods. The sampling rate can be Nyquist rate or a rate much higher than the Nyquist rate, often known as an “oversampling” rate.
A/D converters that use an oversampling modulator are often known as delta-sigma modulators. While a delta-sigma modulator is inherently an oversampling modulator, oversampling is just one of the techniques contributing to its overall performance. The oversampling modulator, or delta-sigma modulator, preferentially shapes the frequencies of the quantizer-induced noise so that the majority of noise lies between the Nyquist rate and the oversampling rate, and only a small portion is left in the frequency band of interest.
A delta-sigma modulator can be fairly simplistic in its architecture or rather complex depending on its targeted application. For example, the delta-sigma modulator can employ feedback to a single summing node at the input of a single integrator, or feedback to multiple summing nodes at the inputs of multiple integrators performing first order modulator, a second order modulator, etc. Examples of first and second order delta-sigma modulators are shown in U.S. Pat. No. 4,851,841 (herein incorporated by reference). In addition to multiple orders, delta-sigma modulators can be cascaded together with gain and/or scaling between stages, and possibly a noise cancellation circuit applied to each stage or combination of stages. Examples of cascaded delta-sigma modulators are described in U.S. Pat. Nos. 5,654,711; 5,146,166; 4,920,544; and 5,061,928 (each of which are herein incorporated by reference).
Regardless of whether they are single or multi-order, single or multi-stage, most modulators typically produce a single serial bit data stream of digital pulses representing a change in magnitude of the incoming analog signal. Delta-sigma modulators that produce a one-bit digital signal as a continuous stream of delta-sigma modulated pulses are known as one-bit quantizers. Oversampling modulators that receive analog signals are henceforth referred to as “analog delta-sigma modulators”, while oversampling modulators that receive digital signals are henceforth known as “digital delta-sigma modulators.”
A one-bit analog delta-sigma modulator is known to have optimal linearity since the D/A converter in the feedback loop has only two levels, which makes a one-bit analog delta-modulator inherently linear regardless of its quantization threshold position. Using only two levels of quantization, the threshold between those levels need not be accurately positioned because it is preceded by the high DC gain of the integrator. More recent quantizers, however, are multi-level quantizers. Multi-level quantizers require, however, several thresholds and corresponding spacings between thresholds. For example, a multi-bit quantizer can use a high-speed flash converter that assigns one comparator for each possible level. The comparator outputs are encoded into an appropriate binary word representative of a multi-bit digital signal. Thus, instead of having a one-bit output, a multi-bit quantizer produces numerous bits forwarded in parallel across corresponding conductors of a multi-conductor bus.
A multi-bit quantizer associated with either an analog or digital delta-sigma modulator has many advantages over the corresponding 1-bit analog or digital delta-sigma modulator. For example, a multi-bit delta-sigma modulator (analog or digital) has an inherently lower quantization noise since the imputed noise by the multi-bit quantizer decreases exponentially with the number of bits used in the quantizer. Thus, every additional bit used in the multi-bit quantizer significantly reduces the quantization noise and lessens the complexity of both the modulator (i.e., orders and stages) and the digital decimation filter. The lower noise-shaping order is achievable with smaller oversampling ratios. The low pass filter requirements within the D/A converter is also minimized due to the lower imputed noise. Additionally, multi-bit modulation enjoys reduced idle channel tones and a more relaxed analog speed requirement. By minimizing noise, a lower oversampling ratio is achieved for a given noise-shaping order, or vice-versa.
While multi-bit modulators have significant advantages over 1-bit modulators, multi-bit modulators can, unfortunately, introduce non-linearity into the converter. Non-linearity is primarily caused by misplaced levels in the multi-bit D/A converter. The misplaced levels force the encoded digital output to skew or improperly map. While multi-bit quantizers have many advantages such as lower quantization noise, more stability, and lower complexity needed of the digital decimation filter and low pass filter, multi-bit quantizers inherently induce non-linear gain and, more importantly, non-linearity into the incoming signal itself.
There currently exists several strategies for achieving a more linear multi-bit D/A converter. For example, the D/A converter can be made of components external to the mixed signal integrated circuit embodying the delta-sigma modulator. Alternatively, critical elements of the D/A converter can be trimmed to ensure accuracy and compatibility. Both strategies attempt to make the 2
N
−1 parallel unit elements (hereinafter “components”) on the internal D/A topography approximately equal in value, where N is the number of bits received by a D/A converter. Forming the components external to the mixed signal integrated circuit, or trimming components on the same monolithic substrate on a dissimilar monolithic substrate, are techniques which can be categorized as “static element matching.”
Another method of element matching is often referred to as “dynamic element matching,” or DEM. DEM techniques are chosen to dynamically select differing subsets of each parallel unit element or component. Popular such components are resistors, transistors, current sources, and/or capacitors, which are targeted to be equal in value. The intent of DEM is to exploit the fact that the output of the multi-bit converter is followed by a filter that will remove high-frequency energy by converting the static error into a wide-band noise signal. DEM involves selecting different elements at different times, thereby imparting randomness into the selection process. An overview of the various fixed and dynamic element matching techniques is set forth in Carley et al., “Delta-Sigma ADCs With Multibit Internal Converters,”
Delta
-
Sigma Data Converters: Theory, Design, and Simulation
(herein incorporated by reference).
There are various known DEM techniques used to choose different elements within the D/A converter. For example, interconnection between what is known as a thermometer decoder and the unit elements can be determined at random for each time period. With ideal randomization, there will be no correlation between the mismatch error at one time and the mismatch error at another time. T
Fujimori Ichiro
Hairapetian Armond
Longo Lorenzo
Asahi Kasei Microsystems, Inc.
Conley & Rose & Tayon P.C.
Daffer Kevin L.
Nguyen John
Young Brian
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