Circuit structure, semiconductor integrated circuit and path rou

Details Circuit structure, semiconductor integrated circuit and path rou Circuit structure, semiconductor integrated circuit and path rou

1994-06-27

1995-12-12

Trans, Vincent N.

Boots, shoes, and leggings

364489, 364488, G06F 1750

Patent

active

054756111

ABSTRACT:
An interconnection path layout in a circuit structure having terminals arranged in rows, such as a semiconductor integrated circuit. Paths are first assigned to selected obstruction-free terminal pairs to be interconnected, and then bypasses are assigned to the remaining obstruction-existing terminal pairs to be interconnected. This minimizes the occurrence that the terminal pairs are left un-interconnected. Also, longer vertical paths are assigned to selected terminal pairs with priority. This prevents the reserved paths from becoming obstructions to vertical paths which are later assigned to selected terminal pairs.

REFERENCES:
patent: 4613941 (1986-09-01), Smith et al.
patent: 4752887 (1988-06-01), Kuwahara
patent: 4835705 (1989-05-01), Fujino et al.
patent: 4852015 (1989-07-01), Doyle, Jr.
patent: 4855929 (1989-08-01), Nakajima
"Rectilinear Area Routing: A Channel Router Approach" by J. A. Hudson et al., IEEE 1985, pp. 468-471.
"A Hierarchical Routing System for VLSI Including Large Macro" by Hiwatashi et al., IEEE 1986 Cust. Integrated Circuit Conf., pp. 235-238.

Affiliated with

Also associated with

Rating

Circuit structure, semiconductor integrated circuit and path rou does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit structure, semiconductor integrated circuit and path rou, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit structure, semiconductor integrated circuit and path rou will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1365427