Circuit structure and system configuration for implementing pseu

Details Circuit structure and system configuration for implementing pseu Circuit structure and system configuration for implementing pseu

1994-03-14

1997-06-03

Jankus, Almis R.

395501, G06T 100

Patent

active

056363397

ABSTRACT:
The present invention discloses a data processing module for generating an interpolated output from four sampled input data. The data processing module includes an input means, i.e., a memory module, for receiving the four sampled input data. The data processing module further includes a pseudo four-point interpolation (PFPI) module for receiving a ratio value p and for generating the interpolated output by utilizing a novel pseudo four-point interpolation algorithm as represented by an Equation (6).

REFERENCES:
patent: 5351087 (1994-09-01), Christopher et al.

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