Circuit structure

Electricity: electrical systems and devices – Miscellaneous

Patent

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Details

361393, 361395, 361412, 361416, H05K 114

Patent

active

044727658

DESCRIPTION:

BRIEF SUMMARY
DESCRIPTION

1. Technical Field
This invention pertains to the mechanical arrangement of related multiple electrical circuits.
2. Background Art
U.S. Pat. No. 3,206,648 discloses a quasi-three-dimensional structure in which electronic components are connected between metallic X and Z axis combs and Y axis buses in spaced relation.
However, elongated boxes (47) are provided between each tier through which the many inter-connecting wires must be run.
A large number of insulating spacers (30) are used to support the combs and the buses. "Tridimensional conductors functions are presented in a bidirectional manner." (col 2, lines 40-1).
Mother-boards are not mentioned, nor are zero-insertion-force connectors; these having been invented a few years after the filing dated of this invention. Obviously, there is no suggestion of the coordinated connection of zero-insertion-force connector pins from one side of a mother-board to the other.
In U.S. Pat. No. 3,206,648 the signal paths are strictly two-dimensional, with control circuits only in the third dimension.
U.S. Pat. No. 3,377,515 discloses a two-tier cage for holding a plurality of circuit cards and making connections thereto. A plurality of finger pairs (30) on the cage make contact to each circuit card. The circuit arrangement is two-dimensional and there is no mention of any scheme for connecting the finger pairs, one to another.


DISCLOSURE OF INVENTION

A three-dimensional mechanical disposition of an electrical circuit having plural inputs and plural outputs. The structure is arranged in tiers. It is comprised of circuit-carrying cards disposed on edge between intervening mother-boards. Zero-insertion-force (ZIF) connectors upon the mother-boards accept the circuit-carrying cards, making selected contacts with the circuits thereof.
Conductive pins of the ZIF connectors make common point electrical connections through the mother-boards. ZIF connectors of alternate tiers are orthogonally arranged.
The structure eliminates wire connections between tiers.


BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a perspective elevation view of a three-tier three-dimensional circuit structure.
FIG. 2 is a simplified diagram of the structure of FIG. 1 showing how the connection scheme is implemented.
FIG. 3 is an enlarged exploded detail of the three-dimensional circuit structure, illustrating the orthogonal aspect.
FIG. 4 is a plan view of pin connection intersections.
FIGS. 5, 6 and 7 are plan views of alternate modes of intersection connections.
FIG. 8 is a schematic diagram of a routing type switcher that can be embodied in the three-dimensional circuit structure of this invention.


BEST MODE FOR CARRYING OUT THE INVENTION

The essential aspect of the invention is shown in FIG. 4 where the pin connections through a mother-board are shown as black diamond shapes. These are electrically conductive areas that connect plural pins.
An illustrative complete structure is shown in FIG. 1.
In FIG. 1, numeral 1 identifies the top or primary tier of plural circuit cards.
Similarly, numeral 2 identifies a middle or secondary tier of plural circuit cards. Note that these are orthogonally (at right angles) arranged with respect to the disposition of the primary cards.
Further, numeral 3 identifies the lower or tertiary tier of plural circuit cards. These are orthogonally arranged with respect to the disposition of the secondary cards. This results in a parallel arrangement with respect to the primary cards.
Mother-board 4 is disposed between the primary and secondary tiers, and mother-board 5 between the secondary and tertiary tiers. These two mother-boards are spaced apart in parallel relation by mechanical support 6, which may also be reproduced at the front and back sides of these mother-boards for mechanical rigidity. This has not been shown in FIG. 1 for sake of clarity.
Atop mother-board 4 are first plural, spaced, parallel-related zero-insertion-force (ZIF) elongated electrical connectors 7, 7', 7", 7.sup.n ; for example, eight of them. These each support and make electrical

REFERENCES:
patent: 2701346 (1955-02-01), Powell
patent: 2799837 (1957-07-01), Powell
patent: 2955236 (1960-10-01), Luhn
patent: 3206648 (1965-09-01), Jordan, Jr. et al.
patent: 3355722 (1967-11-01), Grubb et al.
patent: 3660803 (1972-05-01), Cooney
patent: 3668476 (1972-06-01), Wrabel et al.
patent: 4179724 (1979-12-01), Bonhomme
patent: 4220382 (1980-09-01), Richie et al.

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