Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2007-05-22
2007-05-22
Rodriguez, Paul (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C257S499000, C716S030000
Reexamination Certificate
active
10668974
ABSTRACT:
From the data of diffusion-length-dependent parameters extracted from the parameters of the transistor model of MOS transistors and from the parameters of transistors having various diffusion lengths, a diffusion-length-dependent parameter correcting unit creates approximate expressions of the diffusion length dependence of these parameters, and calculates parameter correction values to be used instead of original parameter values by using the created approximate expressions. Hence, the correction values can be used easily instead of the original parameter values, whereby a transistor model of MOS transistors having a different diffusion length DL can be created easily. Circuit simulation in consideration of the diffusion length dependence of the drain currents of MOS transistors can thus be carried out, whereby highly accurate simulation can be attained.
REFERENCES:
patent: 5648920 (1997-07-01), Duvvury et al.
patent: 6314390 (2001-11-01), Bittner et al.
patent: 6618837 (2003-09-01), Zhang et al.
patent: 6649429 (2003-11-01), Adams et al.
patent: 6909976 (2005-06-01), Kitamaru et al.
patent: 2000-322456 (2000-11-01), None
patent: 2001-035930 (2001-02-01), None
Chung et al, “An Analytical Threshold-Voltage Model of Trench-Isolated MOS Devices with Nonuniformly Doped Substrates”, IEEE Transactions on Electron Devices, vol.39, No. 3, Mar. 1992.
Lin et al, “A Closed-Form Back-Gate-Bias Related Inverse Narrow-Channel Effect Model for Seep-Submicron VLSI CMOS Devices Using Shallow Trench Isolation”, IEEE Transactions on Electron Devices, vol. 47, No. 4, Apr. 2000.
Bianchi et al, “Accurate Modeling of Trench Isolation Induced Mechanical Stress Effects on MOSFET Electrical Performance”, International Electron Devices Meeting, IDEM '02, Digest, pp. 117-120, Dec. 8-11, 2002.
Yamaguchi, Ken, “Field Dependent Mobility Model for Two-Dimensional Numerical Analysis of MOSFET's”, IEEE Transactions on Electron Devices, vol. ED-26, No. 7, Jul. 1979.
Chu et al, “A Database-Driven VLSI Design System”, IEEE Transactions on Computer-Aided Design, vol. CAD-5, No. 1, Jan. 1986.
Aggarwal et al, “A Methodology for Pre-Determination of Bipolar SPICE Model Parameters in BICMOS Technology”, Proceedings of IEEE International Conference on Microelectronic Test Structures, vol. 6, Mar. 1993.
G. Scott et al., “NMOS Drive Current Reduction Caused by Transistor Layout and Trench Isolation Induced Stress,” IEDM Technical Digest, U.S.A., IEEE (1999) pp. 827-830.
Sakamoto Hironori
Shimizu Takashi
Jacob Mary C
NEC Electronics Corporation
Rodriguez Paul
LandOfFree
Circuit simulation apparatus incorporating diffusion length... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit simulation apparatus incorporating diffusion length..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit simulation apparatus incorporating diffusion length... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3804128