Circuit providing equalized duty cycle output

Details Circuit providing equalized duty cycle output Circuit providing equalized duty cycle output

1992-04-14

1993-07-13

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307270, 307351, 307494, 328 36, 328127, H03K 500, H03K 301, H03K 508, G06G 712

Patent

active

052276716

ABSTRACT:
A duty cycle equalization circuit equalizes the duty cycle of an incoming two-level logic driving signal and includes a CMOS current source having source electrodes connected to receive the two-level logic driving signal and having drain electrodes connected to a sawtooth signal forming path, a sawtooth wave forming circuit element, such as a capacitor, connected to the sawtooth signal forming path for forming a sawtooth waveform, a reference voltage circuit, such as a low pass filter, for generating a reference voltage level as a function of the two-level logic driving signal, and a differential comparator circuit element connected to receive the sawtooth waveform at a data input thereof, and to receive the reference voltage at a reference signal input thereof, and to put out a logical signal timed to correspond with crossings of the sawtooth signal through the reference voltage level.

REFERENCES:
patent: 4360747 (1982-11-01), Ryan
patent: 4480200 (1984-10-01), Tan et al.
patent: 4634892 (1987-01-01), Isbell et al.

Affiliated with

Also associated with

Rating

Circuit providing equalized duty cycle output does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit providing equalized duty cycle output, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit providing equalized duty cycle output will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2314414