Circuit probing methods

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Details

C134S026000, C324S1540PB

Reexamination Certificate

active

06480015

ABSTRACT:

TECHNICAL FIELD
This invention relates to integrated circuit and other circuit probing methods.
BACKGROUND OF THE INVENTION
Circuit probing devices in the electronic industry typically utilize sharp pins or needles which are used to physically and removably contact circuit bonding pads. For example, circuit probe devices are utilized during manufacture for testing operability of circuits formed on monolithic semiconductor substrates. Circuit probe devices are also utilized to program integrated circuits, such as ROM devices.
Conventional probe pins typically are aligned to engage the bond pads of the circuitry being tested, programmed or otherwise accessed at an angle other than perpendicular. This enables the pins to bend somewhat when contacting the bond pads such that better and more reliable physical contact is made. Some scraping or removal of the bond pad material (typically aluminum), however, can occur. The removed material can adhere to the probe pins when the probe device is removed from the integrated circuit. The removed bonding pad and other material on the pins is presently subsequently removed from the pins by mechanical scraping with an abrasive surface, such as a sandpaper-like product.
A significant improvement in circuit probing and apparatus used therein has been developed by the assignee of this patent. Exemplary preferred methods and apparatus pertaining thereto are disclosed in U.S. Pat. Nos. 5,326,428 and 5,478,779, which are herein incorporated by reference. In preferred embodiments, such disclose probe cards formed of a semiconductor substrate, such as a monocrystalline silicon wafer. The cards are fabricated by etching into the silicon wafer to create peaks which project from the wafer. Projecting apexes are also fabricated to project from the peaks. An insulative material, such as silicon dioxide, is formed over the apexes and peaks. A conductive material, such as metal, is formed over the apexes, and is patterned to extend to desired locations and circuitry to enable functioning as a conductive probe card.
These sharp conductive peaks are utilized to engage bond pads of integrated circuitry formed on monolithic chips, and other circuitry. The apexes can operate by actually physically deforming the bond pad slightly, and projecting thereinto preferably substantially perpendicularly relative to the typical planar orientation of the bond pads. This engagement can result in more reliable electrical interconnection, but unfortunately can also result in more aluminum or other metal material from the bond pads adhering to the apexes upon removal. The outermost contacting metal of such silicon probe cards is typically and preferably made of some material other than aluminum, such as W, TiSi
2
, or WSi
x
. In addition to metal being removed from the bond pads, such engagement also can result in removal of organic material and oxide material present on the circuit bond pads.
Mechanical removal of such contaminants removes the contaminants only from the outermost surfaces being scraped, and can leave undesired material on other locations of the probe card. This can have a tendency to reduce the life of the probe cards to a shorter period than desired. Furthermore, mechanical removal tends to cause damage to brittle metal coated on the probe tips or projecting apexes.
SUMMARY OF THE INVENTION
In accordance with one aspect of the invention, a circuit probing method includes contacting a conductive probe with a contact pad of an electronic circuit. An electric signal is sent between the contacted probe and the contact pad. After sending the signal, the conductive probe and contact pad are removed from contacting one another. After the removing, the conductive probe is chemically cleaned.
In further aspects of the invention, an integrated circuit on a semiconductor substrate has at least one conductive contact pad. A circuit probe formed from a semiconductor wafer has at least one conductive projecting apex. The conductive apex is brought into contact with the contact pad. An electric signal is sent between the contacted contact pad and the projecting apex. After sending the signal, the apex and contact pad are removed from contacting one another. After the removing, the conductive apex of the circuit probe is chemically cleaned. After the chemical cleaning, the conductive apex is contacted with another contact pad of another integrated circuit formed on another semiconductor substrate, and an electric signal is sent therebetween. The process can be repeated several times. Further, multiple probe engagements can of course occur between cleanings.


REFERENCES:
patent: 3628144 (1971-12-01), Aronstein
patent: 4314855 (1982-02-01), Chang et al.
patent: 4590422 (1986-05-01), Milligan
patent: 5220279 (1993-06-01), Nagasawa
patent: 5288332 (1994-02-01), Pustilnik et al.
patent: 5308400 (1994-05-01), Chen
patent: 5326428 (1994-07-01), Farnworth et al.
patent: 5383972 (1995-01-01), Waltz
patent: 5478779 (1995-12-01), Akram
patent: 5652428 (1997-07-01), Nishioka et al.
patent: 5666063 (1997-09-01), Abercrombie et al.
patent: 5728229 (1998-03-01), Despres
patent: 5814158 (1998-09-01), Hollander et al.

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