Circuit output stage arrangement

Amplifiers – With semiconductor amplifying device – Including push-pull amplifier

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Details

330288, 330296, H03F 326

Patent

active

045730210

ABSTRACT:
A circuit arrangement including first and second output transistors, a sensor diode means, and a circuit means. The first output transistor drives the load positive. The second output transistor drives the load negative. The sensor diode means senses the current in the collector of the first output transistor. The circuit means is connected in circuit with the sensor diode means and the base of the second output transistor for establishing the quiescent current level of the first output transistor. An output of the circuit means is applied at the base of the second output transistor for preventing the output of the first output transistor from falling substantially below its quiescent current level. The output of the circuit means is dependent upon the current sensed by the sensor diode means.

REFERENCES:
patent: 2896029 (1959-07-01), Lin
patent: 3863169 (1975-01-01), Knight
patent: 3974456 (1976-08-01), Russell et al.
R. K. Oswald; Class B-Emitter-Follower, IBM Technical Disclosure Bulletin, vol. 8, No. 10, Mar. 1966.
"Ion-Implanted JFET-Bipolar Monolithic Analog Circuits", by Russell and Culmer, 2/14/74, 1974, IEE International Solid-State Circuits Conference.
"Integrated Circuits for Accurate Linear Analogue Electric Signal Processing", by J. H. Huijsing, Deflt University Press, 1981.

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