Circuit of SDRAM and method for data communication

Static information storage and retrieval – Addressing – Including particular address buffer or latch circuit...

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S233100

Reexamination Certificate

active

10904267

ABSTRACT:
A data communication circuit of a SDRAM for data communication comprises a plurality of data lines coupled to a plurality of data pins. The number of the data lines, according to an embodiment of the present invention, is less than the number of the data pins. When the data communication circuit receives/outputs data, one of the LDQM pin and the UDQM pin are enabled to receive/output a first part of the data. The other LDQM pin and the UDQM pin are enabled. Accordingly, the data communication circuit of the SDRAM, according to an embodiment of the present invention, is capable of transmitting more data using a bus with a narrow width.

REFERENCES:
patent: 6496403 (2002-12-01), Noda et al.
patent: 6867993 (2005-03-01), Ohshima et al.
patent: 6944092 (2005-09-01), Kang

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Circuit of SDRAM and method for data communication does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Circuit of SDRAM and method for data communication, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit of SDRAM and method for data communication will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3726619

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.