Circuit of redundancy IO fuse in semiconductor device

Details Circuit of redundancy IO fuse in semiconductor device Circuit of redundancy IO fuse in semiconductor device

2006-03-21

2006-03-21

Zweizig, Jeffrey (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

Fusible link or intentional destruct circuit

Reexamination Certificate

active

07015743

ABSTRACT:
Provided is related to a redundancy IO fuse circuit of a semiconductor device. The redundancy IO fuse circuit is advantageous to enhancing an overall processing speed of a redundancy operation by preventing a voltage drop by a threshold voltage due to an NMOS transistor, by reducing back bias effects, preventing a decrease of noise margins at an inverter connected to an IO bus, and by improving time delay property involved in current reduction according to variation of operation mode.

REFERENCES:
patent: 5173616 (1992-12-01), Hinooka
patent: 5424672 (1995-06-01), Cowles et al.
patent: 6566937 (2003-05-01), Mori et al.

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