Circuit manufacturing using etched tri-metal media

Details Circuit manufacturing using etched tri-metal media Circuit manufacturing using etched tri-metal media

1999-11-01

2002-04-02

Dang, Thi (Department: 1763)

Etching a substrate: processes

Forming or treating electrical conductor article

C216S020000

Reexamination Certificate

active

06365057

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to articles formed from multiple metal layers used in electronic devices, and more particularly, to multiple metal layers attached to substrates to provide circuitry or circuit boards. The invention is especially advantageous when applied to manufacturing processes for thin circuit boards, particularly circuit boards with physically durable structures, including air bridges.
2. Background of the Art
A technique for forming a tri-layer metal structure is described in U.S. Pat. No. 5,428,250 to Ikeda et al. The tri-layer metal structure is formed on a glass substrate. The first layer is a Ta—M—N film, the second layer is a Ta film and the third (top) layer is a Ta—M—N film, where M is at least one atom selected from the group consisting of Molybdenum, Niobium, and Tungsten.
U.S. Pat. No. 5,153,754 to Whetten described a tri-layer metal structure formed on an LCD substrate where the first layer is a titanium (Ti) film, the second layer is a molybdenum (Mo) or aluminum (Al) film, and the third (top) layer is a titanium (Ti) film. In addition, column 6, lines 56-70 describe a process to taper etch the tri-layer metal structure. When the second layer is a molybdenum film, the tri-layer structure is formed by wet etching the titanium first layer with fluoroboric acid (HBF
4
), wet etching the molybdenum second layer with PAWN (phosphoric acid, acetic acid, water and nitric acid), and dry etching the titanium third layer in a plasma barrel etcher with an atmosphere of CF
4
and O
2
(or SF
6
and O
2
). When the second layer is an aluminum film, the tri-layer structure is formed in a single etch step by an RIE etch of BCl
3
, CCl
4
and O
2
.
U.S. Pat. No. 5,464,500 to Tsujimura et al. describes a tri-layer metal structure formed on a glass substrate. A silicon oxide layer is formed on the glass substrate. The first metal layer of Aluminum (Al) is formed on the silicon oxide layer. The second metal layer of aluminum oxide is formed on the first metal layer. The third metal layer of molybdenum is formed in the aluminum oxide layer. Beginning at column 3, line 60, a process for taper etching the tri-metal layer is described. As a result, the cross section of the first metal layer of aluminum is formed with a taper angle.
U.S. Pat. No. 4,824,803 to Us et al. describes a tri-layer metal structure formed on a glass layer wherein the first metal layer is a titanium (Ti) film, the second metal layer is an Aluminum (Al) film, and the third metal layer is a titanium film. As described beginning at column 2, line 45, the tri-metal structure is formed in a single RIE etch step of a chlorine based chemistry. As shown in
FIGS. 1
a
and
1
b
, the RIE etch step results in a non-tapered structure with vertical sidewalls.
U.S. Pat. No. 4,650,543 teaches a GaAs FET electrode wiring layer or bonding pad having a three-layered structure of Au/Pt/Ti or a two-layered structure of Al/Ti. The electrode wiring layer or the bonding pad is sometimes formed by a wet etching method but mainly by a lift-off method. A method of forming a bonding pad by wet etching is described. In this case, an insulating film is formed on a GaAs semiconductor substrate by CVD, and thereafter a contact hole is selectively formed in the insulating film. A metal film for forming a bonding pad is deposited on the overall surface of the substrate, and a resist pattern is formed thereon. Finally, the metal film is etched by wet etching using the resist pattern as a mask so as to form a bonding pad of the metal film on the hole of the insulating film. In this method, since the GaAs semiconductor layer is highly sensitive to chemical treatment, when the wet etching method is used, side etching occurs. For this reason, this method is inappropriate for forming a micropattern such as a gate electrode. Note that in a GaAs FET, a submicron micropattern must be formed. Therefore, a lift-off method was developed for micropatterning. This method is described in U.S. Pat. No. 3,994,758. However, the metal film formed by this method was formed by CVD (Chemical Vapor Deposition) at a low temperature because of a resist film. For this reason, bonding between a metal multilayer and a semiconductor substrate constituting an electrode pattern was inadequate. Therefore, the electrode pattern was easily removed during lifting off or wire bonding, thus degrading the yield in manufacturing of the GaAs FET. This Patent asserted an advance in the technology by the electrode pattern having a multilayer structure selected from the group consisting of Au/WN, Au/W/TiW and Au/Mo/TiW (elements on the left side are positioned uppermost with respect to the semiconductor substrate). In an ion milling technique used in that invention, etching is performed by bombarding a member to be etched with ions of an inert gas such as Ar or Ar+O
2
gas using a shower or beam type device. This technique is inert dry etching and is also called ion etching. This ion milling technique has been disclosed in, e.g., Solid State Tech. March 1983, Japanese Edition p. 51 to 62. In a reactive ion etching technique, by using a parallel-plate, microwave or ion-shower type device, dry etching is performed by reactive plasma using a reactive gas mixture such as CF
4
+O
2
or CF
4
+Cl while activating a member to be etched using an inert gas such as Ar gas.
U.S. Pat. No. 5,912,506 addresses perceived problems of
(a) thinning of additional metal layers crossing the edges of the multi-layer metal structure;
(b) shorts or pinholes formed in one or more insulator layers above multi-layer metal structure due to near vertical or undercut edges; and
(c) controlling the effective width of the multi-layer structure when using an extended non-directional overetch. These problems are variously addressed by the invention of that Patent. A multi-layer metal sandwich structure formed on a substrate includes a first metal layer formed on the substrate and a second metal layer formed on the first metal layer. The second metal layer has tapered side walls. The width of the first metal layer is different than the width of the second metal layer at the interface of the first metal layer and the second metal layer. The multi-layer metal sandwich may also include a third metal layer formed on the second metal layer. The second metal layer may also be substantially thicker than the first or third metal layers. A method for forming the multi-layer metal sandwich with taper and reduced etch bias on a substrate includes the steps of forming a three-layer sandwich of metal on the substrate by forming a first metal layer on the substrate, forming a second metal layer on the first metal layer, and forming a third metal layer on the second metal layer. A resist pattern is formed on the three-layer sandwich, wherein the resist pattern defines etch areas in the three-layer sandwich. The etch areas are exposed to a first etchant that taper etches the second metal layer while not attacking the first metal layer. The etch areas are then etched using a directional etch process, which etches the first metal layer. The resist pattern in then removed. The third metal layer may be removed. Preferably, the first metal layer is titanium (or a titanium alloy), the second metal layer is Aluminum (or an Aluminum alloy), and the third metal layer is Molybdenum (or Molybdenum alloy) or Copper (or a Copper alloy) or other refractory metal (or alloy). In this case, the first etching process for taper etching the aluminum second layer utilizes a wet etchant that is a mixture of phosphoric acid, nitric acid, acetic acid, and water, and the second etching process for etching the titanium first metal layer utilizes an RIE etching process.
U.S. Pat. No. 3,801,388 teaches a method of manufacturing a printed circuit board with crossover circuits and a process for its manufacture. A tri-metal sub-element comprising copper-iron-copper (with nickel as an alternative metal layer) is etched, and an etched copper layer is adhered to a substrate. Ammonium persul

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