Circuit including structural testing means with no dedicated tes

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324263, G01R 3128

Patent

active

058897879

ABSTRACT:
The present invention provides a circuit capable of operating according to a normal operating mode or to a structural operating mode. The test mode is stored in an internal flip-flop via an interface of the circuit. In test mode, the flip-flop is insulated from the interface by multiplexing means. To exit the test mode, an input temporarily dedicated to this function is used, this input being then insulated by multiplexing means from the rest of the circuit.

REFERENCES:
patent: 5127011 (1992-06-01), Combs et al.
patent: 5311520 (1994-05-01), Raghavachari
patent: 5404358 (1995-04-01), Russell
patent: 5553082 (1996-09-01), Connor et al.
patent: 5642057 (1997-06-01), Oke et al.
patent: 5644580 (1997-07-01), Champlin
patent: 5724502 (1998-03-01), Cherichetti et al.

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