Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1991-03-15
1992-11-10
Westin, Edward P.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307450, 3072966, H03K 190175, H03K 1920
Patent
active
051626764
ABSTRACT:
A circuit has a level converting circuit for converting a signal having level in conformance with a first logic system into a signal having a level in conformance with a second logic system. The circuit includes first, second and third voltage lines for respectively supplying first, second and third power source voltages, a level converting circuit coupled to the first and third voltage lines for converting a first signal having a level in conformance with the first logic system into a second signal having a level in conformance with the second logic system, a reference voltage generating part coupled to the first and third voltage lines for generating a reference voltage based on at least the first power source voltage, so that the reference voltage undergoes a corresponding level deviation with respect to a level deviation of the second signal caused by a level deviation in the first signal which occurs due to a level deviation in the first power source voltage, and a logic circuit which employs the second logic system and is coupled to the second and third voltage lines for receiving the second signal from the level converting circuit and for outputting an output signal using the reference voltage from the reference voltage generating part as a bias signal. The first power source voltage is a positive voltage relative to the second power source voltage and the third power source voltage is a negative voltage relative to the second power source voltage.
REFERENCES:
patent: 4410815 (1983-10-01), Ransom et al.
patent: 4496856 (1985-01-01), Ransom et al.
patent: 4743957 (1988-05-01), Hirayama
patent: 4806800 (1989-02-01), Khan
Electronic Design, vol. 26, No. 12, Jun. 7, 1978, p. 146, Rochelle Park, US; S. Barton, "Quad Comparator Provides Two Functions Logic-Level-Shifting and Time Delays", FIG. 2, pp. 146.
Aisaka Tetsuya
Aoki Kouju
Mizuno Moriaki
Sumi Hideji
Fujitsu Limited
Fujitsu VLSI Limited
Sanders Andrew
Westin Edward P.
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