Circuit having charge compensation and an operation method of th

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307594, 307597, 307246, 3072965, H03K 1722

Patent

active

051516144

ABSTRACT:
A residual charge removing circuit connected to a node in a power-on reset pulse generating circuit for removing positive charges which remain in this node when a power supply is turned off is disclosed. This residual charge removing circuit is formed of two N-channel MOS transistors connected in series between the node and the ground, and one capacitor. Out of the two N-channel MOS transistors, the transistor near the node has a grounded gate. The capacitor is connected between a gate of the transistor, out of the two N-channel MOS transistors, which is distant from the node, and a power supply. The gate of the transistor distant from the node is connected to a connection point between the two N-channel MOS transistors. Therefore, when a supply potential lowers below a threshold voltage Vth of the MOS transistors due to the power-off, the transistor distant from the node is turned off, so that a potential of the connection point becomes -Vth owing to a discharge of negative charges from the capacitor. This turns on the transistor near the node, so that the residual charges in the node are offset by the negative charges in the connection point.

REFERENCES:
patent: 4520418 (1985-05-01), Susi
patent: 4649289 (1987-03-01), Nakano
patent: 4818904 (1989-04-01), Kobayashi
patent: 5017803 (1991-05-01), Toshida
patent: 5030845 (1991-07-01), Love et al.
patent: 5039875 (1991-08-01), Chang

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