Circuit having a delay line for use in a data processing system

Details Circuit having a delay line for use in a data processing system Circuit having a delay line for use in a data processing system

1989-10-05

1992-06-30

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307606, 307542, H03K 1716, H03K 19003

Patent

active

051265923

ABSTRACT:
A circuit for generating signals in a data processing system has a passive delay line and logic gates connected to the output taps of the delay line. Isolation resistors are connected between the output taps and the logic gates in order to substantially reduce signal reflections in the signal path within the delay line that are caused by the input capacitance of the logic gates.

REFERENCES:
patent: 2217957 (1940-10-01), Lewis
patent: 3001137 (1961-09-01), Kassel et al.
patent: 3068405 (1962-12-01), Glazer et al.
patent: 3364479 (1968-01-01), Henderson et al.
patent: 3428905 (1969-02-01), Fierston et al.
patent: 3508082 (1970-04-01), Breimer
patent: 3624519 (1971-11-01), Beydler
patent: 3725790 (1973-04-01), Ault et al.
patent: 3817582 (1974-06-01), Green et al.
patent: 4105980 (1978-08-01), Cowardin et al.
patent: 4316148 (1982-02-01), Kaminski
patent: 4316148 (1982-02-01), Kaminski
patent: 4701714 (1987-10-01), Agoston

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