Circuit having a data memory and addressing unit for reading, wr

Details Circuit having a data memory and addressing unit for reading, wr Circuit having a data memory and addressing unit for reading, wr

1984-05-14

1987-03-03

Fears, Terrell W.

Static information storage and retrieval

Addressing

365218, 235488, G11C 1140

Patent

active

046480765

ABSTRACT:
A circuit includes a data memory having an input and non-volatile storage cells being electrically writable and erasable, a function data memory having an input, an output, and a storage cell, an address decoder having an output connected to the input of the data memory and an output connected to the input of the function data memory for addressing the storage cells of the data memory and the storage cell of the function data memory, a logic unit connected to the output of the function data memory, and an addressing unit connected to the data memory and to the logic unit for reading, writing and erasing partial regions of the data memory.

REFERENCES:
patent: 4105156 (1978-08-01), Dethloff
patent: 4211919 (1980-07-01), Ugon
patent: 4295041 (1981-10-01), Ugon

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