Circuit for turning on and off a clock without a glitch

Details Circuit for turning on and off a clock without a glitch Circuit for turning on and off a clock without a glitch

1999-02-17

2000-12-26

ton, My-Trang Nu

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Regenerating or restoring rectangular or pulse waveform

327161, H03K 501

Patent

active

061665746

ABSTRACT:
A clock control circuit prevents glitches when turning a clock signal back on after being turned off following a period of system inactivity and includes a first flip-flop, a second flip-flop, and a NAND gate. The first flip-flop receives a direct input beginclk signal and a clock-triggered stopclk signal. The first flip-flop also has an output Q.sub.1. A change in the beginclk signal is indicative of the start of a clock signal. The periodic signal is for triggering the storage of the stopclk signal in the first flip-flop. The second flip-flop receives the direct input beginclk signal and the output Q.sub.1 of the first flip-flop as a clock-triggered input. The second flip-flop also has an output Q.sub.2. The periodic signal is also for triggering the storage of the output Q.sub.1 of the first storage element in the second storage element. The NAND gate receives the output Q.sub.2 of the second flip-flop as a first input. The output Q.sub.3 of the NAND gate is connected through a delay line to a second input of the NAND gate in a feedback arrangement. The output Q.sub.3 is the clock signal.

REFERENCES:
patent: 4740998 (1988-04-01), House
patent: 4926451 (1990-05-01), Yoshihara et al.
patent: 5083049 (1992-01-01), Kagey
patent: 5825834 (1998-10-01), Chambers et al.
patent: 5900754 (1999-05-01), Nakatani

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