Circuit for trimming FET differential pair offset voltage withou

Details Circuit for trimming FET differential pair offset voltage withou Circuit for trimming FET differential pair offset voltage withou

1981-12-01

1984-08-07

Mullins, James B.

Amplifiers

With semiconductor amplifying device

Including differential amplifier

330256, H03F 130, H03F 345

Patent

active

044646313

ABSTRACT:
A circuit for trimming the offset voltage of a differential amplifier is provided comprising a pair of FET input transistors forming an input stage to the amplifier, and an offset adjustment circuit comprising a temperature-dependent resistive network for reducing post-trim offset voltage drift. The offset voltage is a function of a mismatch between the drain-to-source currents of the inputs transistors. The offset adjustment circuit provides for initial trimming of the offset voltage and automatic post-trim reduction of drift by decreasing this drain-to-source current mismatch to track the decrease in non-controllable device mismatch.

REFERENCES:
patent: 3188576 (1965-06-01), Lewis, Jr.
patent: 3449687 (1969-06-01), Knauber et al.
patent: 3506926 (1970-04-01), Shoemaker
patent: 3528022 (1970-09-01), Adams
patent: 3757239 (1973-09-01), Langan
patent: 3851270 (1974-11-01), Vosteen
patent: 4050030 (1977-09-01), Russell

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