Circuit for transferring a timing signal between circuits...

Television – Synchronization – Automatic phase or frequency control

Reexamination Certificate

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Details

C348S501000, C348S516000, C348S194000

Reexamination Certificate

active

10156209

ABSTRACT:
A timing signal transferring circuit (10) that may be arranged to stably transfer a timing signal (S1) between two video signal processing circuits that may operate at different clock frequencies has been disclosed. A first timing signal (S1) may be received from a pre-stage video processing circuit (13). The first timing signal (S1) may be synchronous with a pre-stage system clock (C1) and may be set to the vicinity of a center of a screen by a video signal. A second timing signal (S2) may be generated on the basis of first timing signal (S1) and transferred to a post-stage video signal processing circuit (14). Second timing signal (S2) may be synchronous with a post-stage system clock (C2). In this way, a disturbance or distortion of a video on a screen due to a difference in system clock frequency affecting a video signal in the post-stage circuit may be reduced or eliminated.

REFERENCES:
patent: 4942471 (1990-07-01), Chikuma et al.
patent: 4964109 (1990-10-01), Yoshioka
patent: 5774701 (1998-06-01), Matsui et al.
patent: 5881113 (1999-03-01), Lee
patent: 6175603 (2001-01-01), Chapman et al.
patent: 6215948 (2001-04-01), Watanabe et al.
patent: 01-144738 (1989-06-01), None
patent: 05-327684 (1993-12-01), None
English Bibliographies and Abstracts of JP 05-327684, and JP 01-144738 (cited above).

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