Circuit for the regulation of an output voltage of a charge...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S544000

Reexamination Certificate

active

06232830

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of electronics, and, more particularly, to a regulation circuit for a charge pump.
BACKGROUND OF THE INVENTION
A circuit for the regulation of an output voltage of a positive charge pump device can be applied particularly to integrated circuits using MOS or CMOS technology operating at low power supply voltages. In particular, the circuit can be applied to integrated circuits using 0.25 micron technology adapted to operate at a supply voltage of 2.5 volts (±10%). Also, the circuit may be required to operate at lower voltages closer to 1 volt in certain applications intended for low power consumption, such as DRAM circuits.
For these applications, the leakage current of P-channel MOS transistors is reduced. In DRAMs, it is useful, for example, to reduce the leakage current of the memory cells to increase their retention time. It is also useful to reduce the power consumption of the integrated circuits in standby mode, particularly for portable or on-board installed systems.
SUMMARY OF THE INVENTION
According to the invention, a regulation device regulates the output voltage of a positive charge pump generator which supplies an output voltage greater than the supply voltage V
DD
of the integrated circuit. This voltage is applied as the bias voltage for the wells of the P-channel MOS transistors of the integrated circuit. A reinforcement is thus obtained for the blocking of the P-channel transistors, which makes it possible to limit or eliminate the current leakages due to these transistors.
Preferably, to obtain better results in terms of limiting leakage currents in an operational mode and in a standby mode, the regulation device according to the invention controls the output voltage of the positive charge pump as a function of the control signals. In the operational mode of the integrated circuit, the output regulated voltage is greater by one MOS transistor threshold voltage level than the power supply voltage of the circuit. In other words, the output voltage is equal to V
DD
+V
T
. In the standby mode of the integrated circuit, the output regulated voltage is greater by about two MOS transistor threshold voltage levels than the supply voltage of the circuit, i.e., the output voltage is equal to V
DD
+2*V
T.
According to the invention, the regulation device comprises means for the transition, at output, from one regulated voltage level to the other as swiftly as possible. It is also possible to impose the level V
DD
of the supply voltage as an output voltage level using an external command. At a low or a very low supply voltage V
DD
, and with an output voltage equal to V
DD
+V
T
applied as a bias voltage for the wells of the P-channel MOS transistors in the operational mode, it is possible that the level V
DD
+V
T
will not allow the execution speed in the integrated circuit to be maintained. The functions of the integrated circuit then will no longer be guaranteed. The external command according to the invention dictates the normal level V
DD
of the supply voltage as the bias voltage of wells, thus enabling the circuit to work normally while consuming more current because of the deterioration of the current specification.
The invention therefore relates to a circuit for the regulation of an output voltage of a positive charge pump voltage generation device of an integrated circuit. The regulation device comprises a comparison circuit receiving a reference voltage at an input, and delivers an enabling signal at an output to the positive charge pump device. The circuit furthermore comprises a first switching circuit controlled by a first control signal for the application of a first voltage level as a reference voltage when the integrated circuit is in the operational mode, and the application of a second voltage level as the reference voltage when the integrated circuit is in the standby mode.


REFERENCES:
patent: 5461338 (1995-10-01), Hirayama et al.
patent: 5557231 (1996-09-01), Yamaguchi et al.
patent: 5703522 (1997-12-01), Arimoto et al.
patent: 5900665 (1999-05-01), Tobita
patent: 6091282 (2000-07-01), Kim
patent: 6107862 (2000-08-01), Makainakano et al.
patent: 0039946A2 (1981-11-01), None
patent: 0800212A2 (1997-10-01), None
patent: 2319370A (1998-05-01), None
patent: 98/59419 (1998-12-01), None

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