Circuit for the acquisition of binary analog signals

Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices

Reexamination Certificate

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Details

C327S206000

Reexamination Certificate

active

06204786

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to the acquisition of binary analog signals at input of a digital integrated circuit.
The dialog between the computer and its peripherals or between several computers or again between a human operator and a computer is often carried out by means of discrete or Boolean analog electrical signals evolving around two voltage thresholds which are at a variable distance from each other, depending on the tolerated noise margins. The voltages then brought into play may be great as compared with the usually accepted voltages in the digital integration technologies most commonly used today (voltages of 5 V), thus making it necessary to obtain a voltage matching. This matching conventionally makes use of an analog interface stage with a resistive divider bridge possibly incorporating a filtering capacitor. When the voltage matching is done, it is necessary to determine the binary state of the signal by comparing its instantaneous voltage with a reference level. This is obtained by subjecting the signal coming from the analog interface stage with a level comparator made by digital technology. Since the slopes of evolution of the signals acquired by means of an analog interface stage are often very gradual as compared with the switching speeds of current digital technologies, there is a great risk of bringing about the oscillation of the digital input stage with the consequence of increased consumption, risky operation and, finally, a consequent diminishing of reliability. To overcome this, there are known ways of using Schmitt triggers instead of simple level comparators. These Schmitt triggers have a switching hysteresis with two distinct thresholds: a top threshold in the upward direction and a bottom threshold in the downward direction.
2. Description of the Prior Art
The input digital stage using Schmitt triggers is made in a cell of the digital integrated circuit. Consequently, it has the drawback wherein its electrical characteristics, hence its switching thresholds, are fixed during the characterizing of its integration cell. Now, in integration technologies, the characterizing of the cells is a costly operation which it is sought to avoid to the greatest possible extent. Thus, it is usual to define the architecture of an ASIC (Applications Specific Integrated Circuit) that is prediffused or pre-characterized on the basis of various types of pre-characterized cells established in advance and pooled in a library. The designer of an ASIC therefore, in order to make a binary analog signal discrete (i.e. draw a two-state logic signal out of it), has only one choice in a limited set of several types of Schmitt trigger input digital stages with fixed characteristics, a set often limited to two types, one using the TTL standard and the other using the CMOS standard. It sometimes happens that, in the set of Schmitt trigger input digital stages available, none is really suitable. The result of this is that, unless the costly solution of developing a specific cell is adopted, the designer of an ASIC circuit must opt for an available type of Schmitt trigger digital input stage having top and bottom switching thresholds which are not at the desired levels but are simply close to them. The digital integrated circuit obtained then shows greater sensitivity to noise or requires a more complex matching stage.
It is an aim of the present invention to combat this drawback by providing a designer of an ASIC digital integrated circuits with increased possibilities in the choice of the top and bottom switching threshold levels of an input digital stage despite the limitations dictated by the fact that there is a limited number of Schmitt trigger input digital stages pre-characterized in a library.
SUMMARY OF THE INVENTION
An object of the invention is a circuit for the acquisition of a binary analog signal comprising several Schmitt triggers with different switching thresholds at input parallel-connected by their inputs and followed by at least one discrete-rendering logic circuit (i.e. a logic circuit deriving a two-state logic signal from a binary analog signal) deducing the state of the binary analog signal from the combination of the output states of the input Schmitt triggers.
Advantageously, the discrete-rendering logic circuit comprises feedback means enabling a temporary setting of the signal level at input of the Schmitt triggers.
The discrete-rendering logic circuit may be used to increase or reduce the apparent hysteresis of two input Schmitt triggers having staged top and bottom switching thresholds. When it is used to increase the apparent hysteresis, it comprises a logic flip-flop circuit which changes its state, on the one hand, when the Schmitt trigger with the highest top switching threshold passes to the logic 1 level and, on the other hand, when the Schmitt trigger with the lowest bottom switching threshold passes to the logic 0 level. When it is used to reduce the apparent hysteresis of two Schmitt triggers having staged top and bottom switching thresholds, it comprises a logic flip-flop circuit which changes its state, on the one hand, when the Schmitt trigger with the highest bottom switching threshold passes to the logic 0 level and, on the other hand, when the Schmitt trigger with the lowest top switching threshold passes to the logic 1 level, and also comprises feedback means which, for a brief instant, force the Schmitt trigger with the highest top switching threshold to cross its top threshold as soon as the input signal has crossed the top threshold of the other Schmitt trigger in the upward direction, and force the Schmitt trigger with the lowest bottom switching threshold to cross its bottom threshold as soon as the input signal has crossed the bottom threshold of the other Schmitt trigger in the downward direction.
The discrete-rendering logic circuit, by enabling the selection of one of the input Schmitt triggers for the upward crossing of its top threshold and the other Schmitt trigger for the downward crossing of its bottom threshold while at the same time, when necessary, ensuring the sensitivity of these two Schmitt triggers to the crossings of these two thresholds, more than doubles the freedom of choice of the designer of ASIC digital integrated circuits, and this freedom of choice is all the greater as the number of types of input Schmitt triggers is great.
Advantageously, the circuit for the acquisition of a binary analog signal forms part of an encapsulated digital integrated circuit and has its different input Schmitt triggers connected at input to one and the same connection pin of the pack of the digital integrated circuit.
Advantageously, the encapsulated digital integrated circuit comprises several circuits of the same kind for the acquisition of a binary analog signal, each having their different input Schmitt triggers connected to the input of one and the same pin of the package of the digital integrated circuit and means for the individual testing of each of the thresholds of the triggers based on sequences of NAND type logic gates each connected to the outputs of one and the same type of Schmitt trigger.
Advantageously, the circuit for the acquisition of a binary analog signal, in addition to the Schmitt triggers with different switching thresholds, parallel-connected by their inputs and in addition to the discrete-rendering logic circuit, connected to the outputs of the Schmitt triggers, which deduces the state of the binary analog signal from the combination of the output states of the Schmitt triggers, comprises an output digital filter eliminating the transient noises caused by the asynchronous operation of the different Schmitt triggers.
Advantageously, the circuit for the acquisition of a binary analog signal, in addition to the Schmitt triggers with different switching thresholds, parallel-connected by their inputs, and in addition to the discrete-rendering logic circuit that is connected to the outputs of the Schmitt triggers and deduces the state of the binary

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