Circuit for testing the frequency of a clock in an electronic sy

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307522, 307523, 328134, 328141, H03D 1300

Patent

active

051754495

ABSTRACT:
A clock frequency tester circuit for determining whether the frequency of a clock (FB) is comprised within a predetermined range (FA-FA
, FA+FA
) centered around a reference frequency (FA), is described. The clock frequency tester circuit includes a frequency mixer which provides an output frequency FQ in accordance with the relation: FQ=absolute value of (FA-FB), for a frequency FB close to FA, and a divide-by-n circuit which divides the frequency FB of the clock to be tested. The frequency tester further includes a phase frequency comparator which has a first and second input lead F1 and F2 which are, respectively, connected to the output of the divide-by-n circuit and to the output of the frequency mixer. The phase frequency comparator generates an output signal Q2 which remains at a steady level whenever F1 input signal has a frequency which is higher than that of the input signal F2, i.e., when the frequency FB to be tested is comprised within the range (FA-FA
, FA+FA
) (for a frequency FB close to FA). Since the factor n can be easily adjusted, any desired degree of accuracy can be provided by the frequency tester circuit disclosed.

REFERENCES:
patent: 4277754 (1981-07-01), Minakuchi
patent: 4291274 (1981-09-01), Suzuki et al.
patent: 4354124 (1982-10-01), Shima et al.
patent: 4513427 (1985-04-01), Borriello et al.
patent: 4843332 (1989-06-01), Cok et al.
patent: 4884035 (1989-11-01), Cok et al.
patent: 4928026 (1991-05-01), Ebesyu
patent: 4940952 (1991-07-01), Kegasa
patent: 5126602 (1992-06-01), Lee et al.

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