Circuit for testing pumped voltage gates in a programmable gate

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

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G01R 2722

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active

059202017

ABSTRACT:
In a field programmable gate array, a test circuit for testing the signal path of a line, through a pass gate, and onto a second line. A memory cell outputs at a V.sub.GG level, where V.sub.GG .gtoreq.V.sub.DD +V.sub.TN. In order to dynamically test the signal path, three transistors and two test signals are used to apply either 0 volts or V.sub.GG to control the pass gate. Two of the transistors are coupled to the memory cell and the pass gate, whereas the third transistor is coupled to the first and second transistors and ground. The two test signals and an inverter control these transistors so that the memory state can be changed to dynamically switch the pass gate according to the test configuration. An electrical signal is then sent through the signal path under test, and the result is monitored.

REFERENCES:
patent: 5255271 (1993-10-01), Tatman et al.
patent: 5517107 (1996-05-01), Ovens et al.
patent: 5521524 (1996-05-01), Houston
patent: 5617021 (1997-04-01), Goetting et al.
"The Programmable Logic Data Book", (1994), pp. 2-9 to 2-16, published by Xilinx, Inc., 2100 Logic Drive, San Jose, California 95124. (Unavailable month).

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