Circuit for synchronizing transitions of bits in a digital code

Details Circuit for synchronizing transitions of bits in a digital code Circuit for synchronizing transitions of bits in a digital code

1988-02-12

1990-07-03

Shoop, Jr., William M.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341159, H03M 114

Patent

active

049395173

ABSTRACT:
An electronic circuit contains a main stage (10 and 12) that produces a digital code consisting of a plurality of bits (B.sub.1 -B.sub.M-1) that make binary transitions as a function of an input parameter (V.sub.I). A synchronization stage (14 and 16) synchronizes transitions of bits (B.sub.0 -B.sub.K-1) in one part of the code with corresponding transitions of bits (B.sub.K -B.sub.M-1) in another part. When the input parameter is in transition regions where bits in the first-mentioned part of the code could go to wrong values, the synchronization stage suitably replaces the values of bits in the first part with information based on bits in the other part.

REFERENCES:
patent: 4430642 (1984-02-01), Weigand et al.
patent: 4612531 (1986-09-01), Dingwall et al.
patent: 4635036 (1987-01-01), Yoshizawa
R. Van de Plassche et al.; "A High-Speed 7 Bit A/D Converter"; IEEE JSSC; Dec. 1979, pp. 938-943.
R. Van de Grift et al.; "A High Performance 8 Bit Video A/D Converter"; European Solid-State Circs, Conf.; 16-18, Sep. 1986; 3 pp.
R. Van de Grift et al.; "AN 8b 50 MHz Video ADC With Folding And Interpolation Techniques"; IEEE Int'L S. S. C. Conf.; Feb. 1987; pp. 94-95.

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