Circuit for synchronizing an asynchronous input signal to a high

Details Circuit for synchronizing an asynchronous input signal to a high Circuit for synchronizing an asynchronous input signal to a high

1989-05-02

1990-11-27

Callahan, Timothy P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307480, 328 63, H03K 513, H03K 700

Patent

active

049738607

ABSTRACT:
A circuit for synchronizing an asynchronous input signal with an internal time base clock operates at a high frequency. The circuit includes an input flip-flop that receives the input signal and an output flip-flop that provides an output signal that is synchronized with the internal time base clock. The input flip-flop and the output flip-flop are interconnected via logic circuitry so that any instability on the output of the input flip-flop caused by failure of the input signal to satisfy the setup and hold conditions of the input flip-flop are isolated from the output of the output flip-flop. The output of the output flip-flop is a stable signal that is synchronized with the internal time base clock.

REFERENCES:
patent: 4408333 (1983-10-01), Fujii
patent: 4498176 (1985-02-01), Wagner
patent: 4730347 (1988-03-01), Paul
patent: 4745302 (1988-05-01), Hanawa et al.
patent: 4782499 (1988-11-01), Clendening

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