Circuit for shifting or rotating operands of multiple size

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

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G06F 501

Patent

active

060062444

ABSTRACT:
A circuit is disclosed for shifting and rotating operands of multiple size. In one embodiment, first and second shifter circuits are provided with the first shifter circuit configured to receive a z bit operand. In this embodiment, the first and second shifter circuits can operate in one of several modes depending on the size of the operand to be shifted or rotated. In one mode, the z bit operand provided to the first shifter circuit includes a y bit operand to be shifted and a copy thereof. The y bit operand and its copy are separated by a plurality of bits each one of which represents a logical zero. The first shifter circuit is coupled to first and second control nodes which are configured to receive control signals. When the first and second control nodes receive a first control signal, the first shifter circuit operates as a full shifter for shifting the received z bit operand in one direction by x bits. When the first and second control nodes receive a second control signal, the first shifter circuit operates as a partial shifter for shifting y bits of the received z bit operand in the one direction by x bits.

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patent: 5822231 (1998-10-01), Wong et al.
patent: 5844828 (1998-12-01), Fujimura et al.

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