Circuit for reproducing a clock signal

Details Circuit for reproducing a clock signal Circuit for reproducing a clock signal

1982-06-02

1983-06-28

Griffin, Donald A.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Logic circuits

307269, H03K 513, H03K 1728

Patent

active

043908012

ABSTRACT:
A circuit for reproducing a clock signal from digital signals reproduced from a recording medium makes self-clocking possible. The circuit includes a phase lock loop having a voltage-controlled oscillator that generates an oscillation output at a frequency which is approximately equal to or an integral multiple of the frequency of the clock signal contained in the reproduced signal. A pulse generating device outputs pulses of a fixed amplitude, triggered by the leading or trailing edge of the input signal, to the phase lock loop. An oscillation device outputs pulses having approximately the same period as the clock signal period. The oscillation device is triggered by the leading or trailing edge of the input signal. A selecting device gates the output pulses of the oscillation device to the phase lock loop. The selecting device interpolates the output pulse spacing of the pulse generating device and the output pulses of the oscillation device so that a clock signal output is obtained from the phase lock loop.

REFERENCES:
patent: 3997800 (1976-12-01), Bain
patent: 4054950 (1977-10-01), Boone
patent: 4208724 (1980-06-01), Rattlingourd
The Compact Disc Digital Audio System: Modulation and Error-Correction, Vries et al., Oct. 31/Nov. 3, 1980, Audio Engineering Society Preprint.
A New Look-Ahead Code for Increased Data Density, Jacoby, IEEE Transactions on Magnetics, vol. MAG-13, No. 5, Sep. 1977.

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