Circuit for reliable data transfer between two central processin

Details Circuit for reliable data transfer between two central processin Circuit for reliable data transfer between two central processin

1982-10-29

1985-02-26

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 1516

Patent

active

045021147

ABSTRACT:
This circuit provides a minimally sized data transfer buffer interface between two central processing units for transferring data blocks of variable size. The circuit provides an indication to one CPU that the other CPU has received all the data words transmitted.

REFERENCES:
patent: 3638195 (1972-01-01), Brender et al.
patent: 4365295 (1982-12-01), Katzman et al.

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