Circuit for reducing the limit cycle in a digital filter

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364745, G06F 1531

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active

043216854

ABSTRACT:
A circuit arrangement of a digital filter comprises an A/D converter supplied with an input analog signal and producing as output a pulse-modulated digital signal, a digital filter for subjecting the digital signal from the A/D converter to a digital operation processing of finite word length, a D/A converter supplied with the resulting output digital signal of the digital filter and converting the same into an analog signal thereby to generate an output analog signal, an input detector for detecting the state wherein there is substantially no input analog signal and responsively producing as output a detection signal, an integrator for integrating the output of the D/A converter, a switching circuit for operating in response to the output detection signal of the input detector to pass the resulting output signal of the integrator, a reference voltage source, and an adder for adding the signal thus passed by the switching circuit and a reference voltage from the reference voltage source and feeding back and imparting the sum signal thus obtained to the A/D converter.

REFERENCES:
patent: 3749895 (1973-07-01), Kao
patent: 3906199 (1975-09-01), Kieburtz et al.
patent: 4034196 (1977-07-01), Butterweck et al.
patent: 4213187 (1980-07-01), Lawrence
Parker et al., "Limit-Cycle Oscillations in Digital Filters", IEEE Trans. on Circuit Theory, vol. CT-18, No. 6, Nov. 1971, pp. 687-697.
Tran-Thong, "Limit Cycles in the Combinatorial Implementation of Digital Filters", IEEE Trans. on Acoustics, Speech and Signal Processing, vol. ASSP-24, No. 3, Jun. 1976, pp. 248-256.

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