Circuit for reducing degradation of voltage differential in a me

Details Circuit for reducing degradation of voltage differential in a me Circuit for reducing degradation of voltage differential in a me

1984-09-04

1986-01-07

Moffitt, James W.

Static information storage and retrieval

Read only systems

Semiconductive

365168, 365203, G11C 1140

Patent

active

045637539

ABSTRACT:
A virtual ground memory which has four state cells coupled to bit lines has a load directly connected to each bit line to reduce the degradation of the output of a selected memory cell due to voltage drop caused by current flow between load and selected memory cell. Additionally, loads which are coupled to the bit lines are also coupled to an adjacent virtual ground line to avoid providing a separate power supply line for the loads.

REFERENCES:
patent: 4460981 (1984-07-01), Van Buskirk et al.

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