Circuit for providing digital data having high clarity in a digi

Excavating

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371 65, 371 251, 328120, G06F 1100

Patent

active

053295382

ABSTRACT:
In the present invention, input data are extracted by a clock and compared with the previous input data. A cyclic counter is provided for cyclically counting clock signals in each noise erasure time period (the maximum retaining time of a signal referred to as noise). When a change is detected in input data, the counter value is stored. When the input data indicate no changes, the counter value and the stored counter value are compared. If a non-coincident result is outputted, it indicates that the noise erasure time has not passed since the input data indicated a change. Therefore, the input data are not outputted. If a coincident result is outputted, it indicates that the cyclic counter counted one cycle. That is, the noise erasure time has passed. Therefore, the input data are outputted since the input data are not recognized as noise.

REFERENCES:
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patent: 3652943 (1972-03-01), Piccirilli et al.
patent: 3961203 (1976-06-01), Hutch
patent: 3997798 (1976-12-01), Breimesser
patent: 4353032 (1982-10-01), Taylor
patent: 4775840 (1988-10-01), Ohmori et al.
patent: 5138636 (1992-08-01), Bardin

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