Circuit for protecting synchronizing patterns

Details Circuit for protecting synchronizing patterns Circuit for protecting synchronizing patterns

2005-08-09

2005-08-09

Miller, Brian E. (Department: 2652)

Dynamic information storage or retrieval

Control of storage or retrieval operation by a control...

Control of information signal processing channel

C369S053340, C369S053150, C369S047350

Reexamination Certificate

active

06928038

ABSTRACT:
A circuit in an optical read/write device for protecting synchronizing patterns is proposed. The protection circuit utilizes a clock with constant frequency as a reference clock. The circuit for protecting synchronizing patterns of this present invention includes a SYNC detector, a frame period counter, a valid-frame-period judgment unit, a frame period memory, a window generator, a real SYNC judgment unit, a SYNC lock judgment unit, and a SYNC signal generator. The circuit counts the pulse number of a reference clock with constant frequency for each frame to get a constant frame period. Then, the circuit can correctly interpolate the lost frame SYNC signal immediately by counting the reference clock, when the disk is defected.

REFERENCES:
patent: 4620300 (1986-10-01), Ogawa
patent: 4872155 (1989-10-01), Yokogawa et al.
patent: 6041029 (2000-03-01), Iida et al.
patent: 6118393 (2000-09-01), Chiba et al.
patent: 6150888 (2000-11-01), Nakazawa
patent: 6536011 (2003-03-01), Jang et al.
patent: 6577569 (2003-06-01), Yamamoto et al.
patent: 2003/0206243 (2003-11-01), Kizu

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