Electricity: electrical systems and devices – Safety and protection of systems and devices – Voltage regulator protective circuits
Patent
1994-07-06
1995-06-13
Deboer, Todd
Electricity: electrical systems and devices
Safety and protection of systems and devices
Voltage regulator protective circuits
361 58, 323908, H02H 902
Patent
active
054248922
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The present invention relates to a circuit for protecting a MOSFET power transistor of variable input impedance.
1. Background of the Invention
Protecting circuits for MOSFET power transistors, especially for protecting these transistors against short circuiting, are already known. To decouple the protecting circuit from the driver circuit, a gate series resistor is necessary. However, if short switching times are to be achieved, it is disadvantageous that the gate series resistor must be of low resistance, i.e., the input current becomes very large. If the static input current is to be reduced in the event of a fault, this can be achieved only using a resistor of high resistance.
2. Summary of the Invention
An object of the present invention is to specify a protecting circuit for MOSFET power transistors which increases the rate of rise of voltage by means of variable input impedance of the drive circuit, i.e., the delay time and thus the switching time are markedly reduced.
As a result of the circuit of the present invention, it is possible in an advantageous manner to reduce the switching power loss and, at the same time, to achieve the maximum possible switching frequency. Furthermore, equivalent switching conditions are achieved with less stringent requirements imposed upon the driver circuit.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows a MOSFET power transistor with a first embodiment of a protecting circuit in accordance with the present invention.
FIG. 2 shows a MOSFET power transistor with a second embodiment of a protecting circuit in accordance with the present invention.
FIG. 3 shows a MOSFET power transistor with a third embodiment of a protecting circuit in accordance with the present invention.
FIG. 4 is a block diagram showing the combination of several protecting circuits in accordance with the present invention.
DETAILED DESCRIPTION
In the block diagram shown in FIG. 1, T1 designates a MOSFET power transistor comprising a plurality of transistors connected in parallel with one another, S designates its source connecting terminal and D designates its drain connecting terminal. The input terminal G of the MOSFET power transistor T1 is connected via a first ohmic resistor R1 to its polysilicon gate.
A first MOSFET auxiliary transister T2 is connected by its source electrode to the source electrode of the MOSFET power transistor T1. The drain electrode of the MOSFET auxiliary transistor T2 is connected to the polysilicon gate of the MOSFET power transistor T1. The polysilicon gate of the MOSFET auxiliary transistor T2 is connected, on the one hand, via a second ohmic resistor R21 to the input terminal G and, on the other hand, via the series circuit of a third ohmic resistor R22 and a protecting diode D1 to the drain connecting terminal D of the MOSFET power transistor T1. Furthermore, the polysilicon gate of the MOSFET auxiliary transistor T2 is connected to one of the plates of a capacitor C1, the other plate of which is connected to the source electrode of the MOSFET auxiliary transistor T2.
A second MOSFET auxiliary transistor T3, which is connected as a diode, is connected by its bulk electrode to the source electrode of the MOSFET power transistor T1. The source electrode of the MOSFET auxiliary transistor T3 is connected to the gate electrode of a third MOSFET auxiliary transistor T4 and to the polysilicon gate of the MOSFET power transistor T1. The drain electrode of the MOSFET auxiliary transistor T3 is connected to the input terminal G of the MOSFET power transistor T1. The gate electrode of the second MOSFET auxiliary transistor T3 is connected, on the one hand, to the drain electrode of the MOSFET auxiliary transistor T3 and, on the other hand, to the source electrode of a third MOSFET auxiliary transistor T4. The drain electrode of the MOSFET auxiliary transistor T4 is connected to the polysilicon gate of the MOSFET power transistor T1. The bulk electrode of the MOSFET auxiliary transistor T4 is connected to the source electrode of the MOSFET powe
REFERENCES:
patent: 5179488 (1993-01-01), Rovner
patent: 5283707 (1994-02-01), Conners
P. Brauschke et al., "TEMPFET--One Step Closer to an Ideal Power Semiconductor Switch", Siemens Components, vol. 24, No. 6, Dec. 1989, pp. 228-232.
H. C. Chang et al., "Integrated Delay Circuit/Noise Rejection Circuit", IBM Technical Disclosure Bulletin, vol. 16, No. 1, Jun. 1973, pp. 317-318.
Oertel Dagmar
Schmid Roland
Topp Rainer
DeBoer Todd
Robert & Bosch GmbH
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