Circuit for producing a data bit inversion flag

Details Circuit for producing a data bit inversion flag Circuit for producing a data bit inversion flag

2007-05-22

2007-05-22

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Digital code to digital code converters

Substituting specified bit combinations for other prescribed...

C341S144000

Reexamination Certificate

active

11361768

ABSTRACT:
A circuit for producing a data bit inversion flag comprises a first summed-current production unit for producing a first summed current, whose amplitude is proportional to the number of different data bits in two adjacent data words in a data burst, a second summed-current production unit for producing a second summed current, whose amplitude is proportional to the number of identical data bits in the two adjacent data words, and a current comparator comparing the first with the second summed current and producing a data bit inversion flag if the first summed current is greater than the second summed current.

REFERENCES:
patent: 4006475 (1977-02-01), Candy et al.
patent: 6243779 (2001-06-01), Devanney et al.
patent: 6509857 (2003-01-01), Nakao
patent: 6721456 (2004-04-01), Aschenbrenner et al.
patent: 6977534 (2005-12-01), Radelinow
patent: 2003/0158981 (2003-08-01), LaBerge

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