Electricity: power supply or regulation systems – Output level responsive – Using a three or more terminal semiconductive device as the...
Reexamination Certificate
2011-01-25
2011-01-25
Sterrett, Jeffrey L (Department: 2838)
Electricity: power supply or regulation systems
Output level responsive
Using a three or more terminal semiconductive device as the...
C323S283000, C323S285000, C323S350000, C323S351000
Reexamination Certificate
active
07876076
ABSTRACT:
A DC-DC converter for preventing through current from causing erroneous operation of an ideal diode. A first transistor for receiving input voltage is connected to an ideal diode, which includes a second transistor and a comparator for detecting current flowing through the second transistor and generating a detection signal. A control circuit generates a switching signal for turning the first transistor on and off so as to keep the output voltage constant. A pulse generation circuit generates a pulse signal for turning off the second transistor before the first transistor is turned on and keeping the second transistor turned off for a predetermined period from when the first transistor is turned on. An erroneous operation prevention circuit generates a control signal for keeping the second transistor turned off from when the second transistor is turned off to when the first transistor is turned on.
REFERENCES:
patent: 3579091 (1971-05-01), Clarke
patent: 4349776 (1982-09-01), Federico et al.
patent: 5912552 (1999-06-01), Tateishi
patent: 6307356 (2001-10-01), Dwelley
patent: 7456623 (2008-11-01), Hasegawa et al.
patent: 2007/0080674 (2007-04-01), Gray et al.
patent: 2007/0145961 (2007-06-01), Hasegawa et al.
patent: 2007/0285077 (2007-12-01), Hasegawa
patent: 2008/0067989 (2008-03-01), Kasai et al.
patent: 2008/0136383 (2008-06-01), Hasegawa et al.
patent: 2009/0051339 (2009-02-01), Hasegawa et al.
patent: 63-307510 (1988-12-01), None
patent: 04-042771 (1992-02-01), None
patent: 4-101286 (1992-09-01), None
patent: 04-128086 (1992-11-01), None
patent: 06-303766 (1994-10-01), None
patent: 10-225105 (1998-08-01), None
Leo Francis Cassy, “Circuit Design for 1-10 MHZ DC-DC Conversion”, Jan. 1989, pp. 67-88, Massachusetts Institute of Technology 1989.
“PFM and PWM synchronous rectification step-down regulator”, 2003, pp. 45-47, vol. 21, No. 5, Fujistu Limited.
“1-channel PFM and PWM synchronous rectification step-down DC-DC converter IC”, 2004, pp. 28-31, vol. 22, No. 6, Fujitsu Limited.
“Korean Office Action,” in corresponding Korean Patent App. No. 10-2007-0043512, mailed on Oct. 12, 2009.
“Taiwanese Office Action,” mailed by Taiwanese Patent Office and corresponding to Taiwanese application No. 096113332 on Apr. 29, 2010.
Fujitsu Patent Center
Fujitsu Semiconductor Limited
Sterrett Jeffrey L
LandOfFree
Circuit for preventing through current in DC-DC converter does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Circuit for preventing through current in DC-DC converter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Circuit for preventing through current in DC-DC converter will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2683424