Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific voltage responsive fault sensor
Reexamination Certificate
1999-05-28
2001-05-22
Sherry, Michael J. (Department: 2836)
Electricity: electrical systems and devices
Safety and protection of systems and devices
With specific voltage responsive fault sensor
C361S056000
Reexamination Certificate
active
06236549
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a wiring arrangement for protecting a circuit that requires one high supply voltage and one low supply voltage against damage due to a failure to maintain the provided order in applying the supply voltages.
2. Description of the Prior Art
Modules which accept multiple integrated circuits (IC), such as modules provided for connection to the standardized PCI (Peripheral Components Interface) bus, require a 5 V supply voltage for the module core and a 3.3 V supply voltage for the IO (Input/Output) buffer, in order to generate the 3.3 V PCI level. However, ESD (Electro Static Discharge)protection diodes and parasitic diodes which are internal to the module are poled in a conductive direction, in case the core is powered with a smaller supply voltage than the IO buffer, wherein an excess current flows into the IO buffer pin. This can lead to damage or destruction of the IO buffer. There is, accordingly, a need for what is known in this technical field as power sequencing, i.e. the maintenance of a starting sequence, according to which first the high supply voltage and then the low supply voltage is switched in (3.3 V after 5 V). In data processing PCs, this starting sequence can be guaranteed since the 3.3 V supply voltage is typically generated from the 5 V supply voltage. In systems with separate supply voltage modules, however, such as those encountered in telecommunication technology, this typically is not the case. Furthermore, the redundancy concept is such that the two supply voltage modules form independent failure units. It is required that no module be permanently damaged if one of the supply voltage modules fails.
In a PC system, the lower supply voltage (3.3 V) is generated from the higher supply voltage (5 V) by an in-phase regulator or a switching controller. Thus, the case cannot arise wherein the higher supply voltage fails and the lower supply voltage remains.
Accordingly, the present invention is directed toward the problem of developing a circuit arrangement as described above so as to avoid damage to an integrated circuit, even given mutually independent power supply modules for the high supply voltage and the low supply voltage, without having to maintain a starting sequence.
SUMMARY OF THE INVENTION
The present invention saves the expense of having to repair damages which arise as a result of a failure to maintain the starting sequence. Accordingly, in an embodiment of the present invention, a circuit is provided for protecting an integrated circuit, which requires both a high operating voltage and a low operating voltage, against damage due to a failure to maintain a provided order in applying the high and low operating voltage, wherein the circuit includes: a terminal for the high operating voltage; a terminal for the low operating voltage; and a diode having a cathode and an anode, wherein the cathode is connected to the terminal for the high operating voltage and the anode is connected to the terminal for the low operating voltage.
In a further embodiment of the present invention, the diode is of the Schottky type. This allows for a substantially total unloading of the diodes contained in the integrated circuit in an operative state in which there is a higher voltage pending at the terminal for the low supply voltage than at the terminal for the high supply voltage.
Additional features and advantages of the present invention are described in, and will be apparent from, the Detailed Description of the Preferred Embodiments and the Drawing.
REFERENCES:
patent: 4110775 (1978-08-01), Festa
patent: 4860151 (1989-08-01), Hutcheon et al.
patent: 4878145 (1989-10-01), Lace
patent: 5245499 (1993-09-01), Senes
patent: 5528447 (1996-06-01), McManus et al.
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patent: 5539334 (1996-07-01), Clapp, III et al.
patent: 5610791 (1997-03-01), Voldman
patent: 5654858 (1997-08-01), Martin et al.
patent: 6002568 (1999-12-01), Ker et al.
patent: 195 01 985 A1 (1996-07-01), None
Bell Boyd & Lloyd LLC
Sherry Michael J.
Siemens Aktiengesellschaft
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