Static information storage and retrieval – Floating gate – Particular biasing
Patent
1999-05-25
2000-04-11
Phan, Trong
Static information storage and retrieval
Floating gate
Particular biasing
36518517, 36518521, G11C 1606
Patent
active
060494808
ABSTRACT:
A circuit for performing an auto-verifying program on a non-volatile memory device which is capable of overcoming a disadvantage of a conventional circuit which it cannot limit a maximum value of a cell current, and thus applies stress to the circuit, which results in large current consumption, includes: a voltage clamping unit applying a clamp voltage to a selected memory cell; a first active load unit supplying a reference current to the selected memory cell; a second active load unit supplying an additional current and limiting a maximum value of the cell current, when the selected memory cell is programmed; and a logic circuit unit isolating each unit from the selected memory cell, when the programming is completed, whereby the circuit directly compares the currents when the auto-verifying program is carried out, does not require a process of computing a variation of the voltage for the cell current, and thus is more simplified, which results in improved memory chip constituting efficiency, and increased accuracy of the auto-verifying program, and the maximum current can be limited when the auto-verifying program is carried out, and thus less stress is applied to the other circuits, such as a high voltage supply unit in a memory chip, and current consumption thereof is reduced.
REFERENCES:
patent: 5495442 (1996-02-01), Cernea et al.
patent: 5684741 (1997-11-01), Talreja
patent: 5801993 (1998-09-01), Choi
patent: 5892714 (1999-04-01), Choi
LG Semicon Co. Ltd.
Phan Trong
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