Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
1998-11-17
2001-08-28
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S408000, C327S534000, C307S086000
Reexamination Certificate
active
06281724
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates generally to integrated circuit voltage control circuits and more particularly to circuits which operate to control the application of two voltage supplies, or sources, one of such voltage sources being applied during a normal operating mode and the other being applied during a standby, or partial power-down mode.
As is known in the art, many systems, such as digital computer systems, are required to operate with two voltage sources, one for interfacing to the computer internally (e.g., 5 volts) and one for interfacing to external peripherals (e.g., 12 volts). An example of this would be an interface transceiver integrated circuit which takes signals from the computer and translates them to the higher voltages required by external peripherals. The problem with this is that in order to safely power-down such a device, both sources need to go to zero volts so that no current flows in this mode.
However, computers are now required to operate in a standby, or partial power-down mode where only one source is turned on and consumes little power, while the other source (generally the higher voltage source) is turned off. In traditional dual voltage source circuits, this mode of operation is not supported because if the 5 volt source is left on while the 12 volt source is turned off and allowed to go to 0 volts, significant current could begin to flow from the 5 volt source.
One technique used to provide dual voltages is a charge pump circuit. With such circuit, power from an external, typically 5 volt, source is also used to generate an internal, typically 10 volt, source. During one mode, charge pump is turned off and the internal 10 volt source is shorted internally to the external 5 volt source through an internal switch. However, if an external source is used to provide the higher voltage, say 12 volts, a problem can occur when the 12 volt source is allowed to drop while the 5 volts is still applied. For example, referring to
FIGS. 1 and 2
, an inverter made up of transistors MP
1
and MN
1
, is a typical device which would be powered off a 5 volt source. However, when a 12 volt source is partially powered down, more particularly, if the 12 volt source is allowed to fall below the 5 volt source, excessive current will flow in an internal parasitic transistor device Q (shown in phantom in FIG.
2
). The parasitic device Q is formed by the n-type substrate (i.e., the base of Q), the p-type material tied to the 5 volts (i.e., the emitter of Q), and the grounded p-type or p-well material (i.e., the collector of Q). This parasitic device will turn on when the 12 volt source drops below the 5 volt source by a Vbe allowing significant amounts of current to flow from the 5 volt source to ground.
SUMMARY OF THE INVENTION
In accordance with the present invention, an integrated circuit chip is provided having formed thereon a voltage control circuit. The voltage control circuit is adapted to couple to other circuits on the chip one of a pair of voltage sources fed to the control circuit selectively in accordance with an operating mode of the voltage control circuit. The voltage control circuit includes a comparator circuit coupled to the pair of voltage sources. A first one of the pair of voltage sources is fed, through a second switch, to an output of the first switch, which provides the output for the voltage control circuit. An input of the first switch is coupled to a second one of the pair of voltage sources. The comparator circuit, first switch and second switch are arranged to place the first switch in a non-conducting condition and the second switch in a conducting condition in one of the operating modes with the second switch coupling the first one of the pair of voltage sources to the output of the voltage control circuit through the second switch while the non-conducting first switch isolates the second one of the pair of voltage sources from the output of the voltage control circuit during such one of the operating modes, and to place the first switch in a conducting condition and the second switch in a non-conducting condition in the other one of the operating modes with the non-conducting second switch de-coupling the first one of the pair of voltage sources from the output of the voltage control circuit while the conducting first switch couples the second one of the pair of voltage sources to the output of the voltage control circuit output during another one of the operating modes.
With such an arrangement, the first voltage source may safely fall towards ground since the second switch isolates the first voltage source from the second voltage source during the second-mentioned operating mode.
In accordance with another feature of the invention, the second switch comprises a diode.
With such an arrangement, the first voltage source may safely fall towards ground since the diode becomes reversed biased thereby isolating the first voltage source from the second voltage source.
In accordance with another feature of the invention, the semiconductor chip includes a substrate having a first type conductivity. The first switch includes a transistor having: a gate connected to an output of the comparator circuit; and one of the source/drain regions thereof connected to the second one of the voltage sources. The source/drain regions are formed in a region of the substrate having a type conductivity opposite to the type conductivity of the substrate.
In accordance with another feature of the invention, the diode is formed between the substrate and a first voltage contact region formed in the substrate.
In accordance with another feature of the invention, the first voltage contact region has the type conductivity opposite to the type conductivity of the substrate. The first voltage source is coupled to the substrate through the diode formed in the substrate.
In accordance with the invention, during the normal operating mode, a p-n junction between the substrate and the first voltage contact region provides the diode and such junction is forward biased conduction thereby electrically coupling the first voltage source to the substrate to provide an output for the voltage control circuit. During the standby mode, the first voltage source falls to ground, the p-n junction becomes reversed biased to electrically isolate the second voltage source from the first voltage.
In accordance with another feature of the invention, the transistor is a PMOS device, the substrate is n type conductivity and the source and drain regions of the transistor are p type conductivity.
In accordance with another feature of the invention, the second switch comprises a second transistor. In a one embodiment, second transistor is controlled by the output of the comparator.
REFERENCES:
patent: 4812672 (1989-03-01), Cowan et al.
patent: 5187396 (1993-02-01), Armstrong et al.
Analog Devices Inc.
Lam Tuan T.
Nguyen Minh
Samuels , Gauthier & Stevens, LLP
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